ST72F521R6 Ver la hoja de datos (PDF) - STMicroelectronics

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ST72F521R6

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72521M/R/AR

15 SUMMARY OF CHANGES

Revision

Main Changes

Changed ITSPR register names to ISPR in Table 2 on page 15

Modified CSS functional description (Glitch filtering with PLL on) in Section 6.4.3 on page 31

Removed AVD interrupt Exit from Halt capability in Section 6.4.4.1 on page 31

VPP absolute max changed from 14 to 13V in Section 12.2 on page 155.

Modified IDD max values in Section 12.4 on page 159

Removed description of low and medium thresholds. Updated LVD min rise time rate. Added

1.6 note and figure on LVD startup behaviour in Section 12.3 on page 156

Updated ADC accuracy data and modified note on negative current injection in Section 10.9

on page 144

Updated PLL characteristics Section 12.5.6 on page 168

External Reset stretch min value changed to 0. in Section 12.9 on page 178

Changed presentation of Option bytes: Byte 0 is displayed left of Byte 1. Option byte default

value changed (AVD/LVD on) in section Section 14.1 on page 191

Date

Oct 02

198/199

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