NCP5009(2003) Ver la hoja de datos (PDF) - ON Semiconductor
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NCP5009 Datasheet PDF : 20 Pages
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NCP5008, NCP5009
Table 1. Shift Register Bits Assignment and Functions
SetReg shift register (Note: The register content is latched upon CS positive going).
Bn Value
After POR
Iout Peak (mA)
B7
0
Iref*k*7.5
B6
0
Iref*k*6.5
B5
0
Iref*k*5.5
B4
0
Iref*k*4.5
B3
0
Iref*k*3.5
B2
0
Iref*k*2.5
B1
0
Iref*k*1.5
LOCAL
CLOCK
CS
L
X
H
L
X
L
H or Open
X
H
H or Open
↓
L
H or Open
↑
L
B1−B7
X
X
No Change
No Change
Qdata → Bn
Output Current
0
Iref * k
Iref * k * (Bn + 0.5)
Iref * k * (Bn + 0.5)
Iref * k * (Bn + 0.5)
The register is clear to zero during the first 20 ns following the CS falling edge.
Note:
Coefficient Value (internal ratio): k = 746
Maximum output peak current @ B7 = 1 and Iphoto = 0 mA : Iout peak = Iref * (7 + 0.5) * 746 = Iref * 5595
Iref
+
Vref
R1
+
1.24
R1
V
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