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MT312GP1N

Satellite Channel Decoder

Zarlink Semiconductor Inc 

Functional Overview MT312

1.4.3 The De-interleaver Block

1.4.3.1 DVB

Before transmission, the data bytes are interleaved

with each other in a cyclic pattern of twelve. This

ensures the bytes are spaced out to avoid the

possibility of a noise spike corrupting a group of

consecutive message bytes. The diagram below

shows conceptually how the convolutional de-

interleaving system works. The synchronisation byte

is always loaded into the First-In-First-Out (FIFO)

memory in branch 0. The switch is operated at

regular byte intervals to insert successively received

bytes into successive branches. After 12 bytes have

been received, byte 13 is written next to the

synchronisation byte in branch 0, etc. In the MT312,

this de-interleaving function is realised using on-chip

Random Access Memory (RAM).

1.4.3.2 DSS

Before transmission, the data bytes are interleaved

with each other in a cyclic pattern of thirteen. This

ensures the bytes are spaced out to avoid the

possibility of a noise spike corrupting a group of

consecutive message bytes. The diagram below

shows conceptually how the convolutional de-

interleaving system works. On the MT312, this

function is realised in the same Random Access

Memory (RAM) as used for DVB, but utilising

different addressing algorithm.

0

one

byte per

1

position

2

3

4

5

6

7

8

9

10

11

Sync word route

0

17x11 bytes

1

17x10 bytes

2

17x9 bytes

3

17x8 bytes

4

17x7 bytes

5

17x6 bytes

6

17x5 bytes

7

17x4 bytes

8

17x3 bytes

9

17x2 bytes

10

17x1

11

Figure 7 - DVB Conceptual diagram o f the conoluntional de-interleaver block

Output

Input

12D

145

0

21

12D

12D

Figure 8 - DSS Conceptual diagram of the convolutional de-interleaver block

13

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