
Truth Tables
tn
J
K
0
0
0
1
1
0
1
1
tn = bit time before clock pulse
tn+1 = bit time after clock pulse
Logic Diagrams
tn+1
Preset
Clear
Qn
Qn
Q
0
0
0
0
Qn
0
1
1
0
0
1
0
0
1
1
1
1
Qn
Qn
Qn
(Note 1)
(Note 1)
Note 1: No change in output from previous state
MM74C73
MM74C76
Transmission Gate
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2