ML9050 Ver la hoja de datos (PDF) - Oki Electric Industry

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ML9050

132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays

Oki Electric Industry 

¡ Semiconductor

PEDL9050-02

ML9050/9051

• Data write

WR

DATA

BUS Holder

Write Signal

• Data read

WR

RD

DATA

Address

Preset

Read Signal

Column

Address

BUS Holder

N

Latch

N

N+1

N+1

N+2

N+2

N+3

N+3

Fig. 2(a)

N

N

n

n+1

Preset N

N

Increment N+1

n

N+2

n+1

n+2

Address Set

#n

Dummy

Read

Data Read

#n

Data Read

#n+1

Fig. 2(b)

• Busy flag

The busy flag being "1" indicates that the ML9050/9051 is carrying out internal operations, and

hence no instruction other than a status read instruction is accepted during this period. The busy

flag is output at pin D7 when a status read instruction is executed. If the cycle time (tCYC) is

established, there is no need to check this flag before issuing every command and hence the

processing performance of the MPU can be increased greatly.

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