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MCP6144 Datasheet PDF : 38 Pages
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4.0 APPLICATIONS INFORMATION
The MCP6141/2/3/4 family of op amps is manufactured
using Microchip’s state of the art CMOS process These
op amps are stable for gains of 10 V/V and higher. They
are suitable for a wide range of general purpose, low
power applications.
See Microchip’s related MCP6041/2/3/4 family of op
amps for applications needing unity gain stability.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6141/2/3/4 op amps are designed to not
exhibit phase inversion when the input pins exceed the
supply voltages. Figure 2-10 shows an input voltage
exceeding both supplies with no phase inversion.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
VDD
Bond
Pad
VIN+
Bond
Pad
Input
Stage
Bond
Pad
VIN–
VSS
Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
(and voltages) at the input pins (see Absolute
Maximum Ratings † at the beginning of Section 1.0
“Electrical Characteristics”). Figure 4-2 shows the
recommended approach to protecting these inputs.
The internal ESD diodes prevent the input pins (VIN+
and VIN–) from going too far below ground, and the
resistors R1 and R2 limit the possible current drawn out
of the input pins. Diodes D1 and D2 prevent the input
pins (VIN+ and VIN–) from going too far above VDD, and
MCP6141/2/3/4
dump any currents onto VDD. When implemented as
shown, resistors R1 and R2 also limit the current
through D1 and D2.
VDD
D1
V1
R1 D2
MCP604X
V2
R2
VOUT
R1
>
VSS
–
(minimum expected
2 mA
V1)
R2
>
VSS
–
(minimum expected
2 mA
V2)
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistor R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (VIN+ and
VIN–) should be very small.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (VCM) is below ground (VSS); see
Figure 2-33. Applications that are high impedance may
need to limit the usable voltage range.
4.1.3 NORMAL OPERATION
The input stage of the MCP6141/2/3/4 op amps uses
two differential input stages in parallel. One operates at
a low common mode input voltage (VCM), while the
other operates at a high VCM. With this topology, the
device operates with a VCM up to 300 mV above VDD
and 300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V to
ensure proper operation.
There are two transitions in input behavior as VCM is
changed. The first occurs, when VCM is near
VSS + 0.4V, and the second occurs when VCM is near
VDD – 0.5V (see Figure 2-3 and Figure 2-6). For the
best distortion performance with non-inverting gains,
avoid these regions of operation.
© 2009 Microchip Technology Inc.
DS21668D-page 15
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