MC68HC05F4 Ver la hoja de datos (PDF) - Motorola => Freescale

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MC68HC05F4

High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

Motorola => Freescale 

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1.1

Features

• Fully static design featuring the industry-standard M68HC05 CPU core

• 3840 bytes of user ROM, plus 16 bytes for vectors

• 256 bytes of RAM

• 256 bytes of user EEPROM

• DTMF/melody generator

• 16-bit programmable timer with two input captures and two output compares

• 15 stage multipurpose core timer with timer overflow, real time interrupt and COP watchdog

• COP watchdog timer (mask option)

• Power saving STOP and WAIT modes

• I/O lines (8 with high-voltage, open-drain outputs)

– 44 QFP configuration – total of 32 dedicated bidirectional I/O pins

– 28 SOIC/PDIP configuration – total of 16 dedicated bidirectional I/O pins

• Keyboard interrupt facility on eight of the I/O lines

• Hardware interrupt with edge or edge-and-level sensitive interrupt trigger

• On-chip oscillator

• On-chip low voltage detection circuit

• Two selectable bus frequencies

• Power-on and power-off resets; low voltage detection circuitry (EEPROM)

• Available in 44-pin QFP package, 28-pin SOIC package and 28-pin PDIP package (ports C

and D not available in 28-pin packages)

1.2

Mask options for the MC68HC05F4

There are three mask options available on the MC68HC05F4: STOP instruction – enable/disable,

low voltage reset – enable/disable, and COP watchdog timer – enable/disable. These options are

programmed during fabrication and must be specified by the customer at the time of ordering.

MOTOROLA

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INTRODUCTION

TPG

MC68HC05F4

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