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MC145202

Low-Voltage 2.0 GHz PLL Frequency Synthesizer Includes On-Board 64/65 Prescaler

Motorola => Freescale 

TEST POINT PINS

TEST 1

Modulus Control Signal (Pin 9)

This pin may be used in conjunction with the Test 2 pin for

access to the on–board 64/65 prescaler. When Test 1 is low,

the prescaler divides by 65. When high, the prescaler divides

by 64.

CAUTION

This pin is an unbuffered output and must be

floated in an actual application. This pin must be

attached to an isolated pad with no trace.

TEST 2

Prescaler Output (Pin 13)

This pin may be used to access the on–board 64/65 pres-

caler output.

CAUTION

This pin is an unbuffered output and must be

floated in an actual application. This pin must be

attached to an isolated pad with no trace.

POWER SUPPLY PINS

VDD

Positive Power Supply (Pin 14)

This pin supplies power to the main CMOS digital portion

of the device. Also, this pin, in conjunction with the Rx resis-

tor, determines the internal reference current for the PDout

pin. The voltage range is + 2.7 to + 5.5 V with respect to the

GND pin.

For optimum performance, VDD should be bypassed to

GND using a low–inductance capacitor mounted very close

to these pins. Lead lengths on the capacitor should be

minimized.

VCC

Positive Power Supply (Pin 12)

This pin supplies power to the RF amp and 64/65 pres-

caler. The voltage range is + 2.7 to + 5.5 V with respect to the

GND pin. In standby mode, the VCC pin still draws a few mil-

liamps from the power supply. This current drain can be elim-

inated with the use of transistor Q1 as shown in Figure 21.

For optimum performance, VCC should be bypassed to

GND using a low–inductance capacitor mounted very close

to these pins. Lead lengths on the capacitor should be

minimized.

VPD

Positive Power Supply (Pin 5)

This pin supplies power to both phase/frequency detectors

A and B. The voltage applied on this pin may be more or less

than the potential applied to the VDD and VCC pins. The volt-

age range for VPD is 2.7 to 5.5 V with respect to the GND pin.

For optimum performance, VPD should be bypassed to

GND using a low–inductance capacitor mounted very close

to these pins. Lead lengths on the capacitor should be

minimized.

GND

Ground (Pin 7)

Common ground.

MC145202

12

MOTOROLA

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