MB91F127PFV Ver la hoja de datos (PDF) - Fujitsu

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fabricante

MB91F127PFV

32-Bit Microcontroller

Fujitsu 

MB91F127/F128

s BLOCK DIAGRAM

FR CPU

RAM (12 Kbytes)

Bit search module

DMA controller

(8 ch.)

Bus converter (32 bits - 16 bits)

X0

X1

RST

HST

INT0 to

6

INT5

Clock control unit

(Watchdog timer)

Interrupt control unit

AN0 to AN7

8

AVCC

AVSS/AVRL

AVRH

ATG

10-bit

A/D converter

(8 ch.)

SI0 to SI2 3

SO0 to SO2 3

SC0 to SC2 3

UART (3 ch)

TCI0 to TCI2 3

Reload timer (3 ch)

OCPA0 to OCPA3 4

OC0 to OC3

IN0 to IN3

4

4

FRCK

PPG

ICU, OCU

Free run timer

Port E, F, G, J

Bus converter

(Harvard - Princeton)

16

D16 to D31

25

A00 to A24

RD

2

WR0, WR1

Bus

RDY

controller

CLK

BRQ

BGRNT

6

CS0 to CS5

ALE

Port2, 3, 4, 5, 6,

7, 8, A

RAM (2 Kbytes)

Flash memory

MB91F127:256 KB

MB91F128:510 KB

Notes : • Terminals are described in functional groups (actual terminals are partially multiplexed).

• For using REALOS, perform time management by external interrupt or built-in timer.

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