Smallest TEC Power Drivers for Optical
Modules
PIN
TQFN
UCSP
10
A5
11
A6
12
B6
13
C5
14
D6, D5, D4
15
E5, E6
16
F5, F6
17
F4
18
C6
19
F3
20
F1, F2
B2, B5, C3,
C4
B3, B4
E3, E4
—
—
Pin Description (continued)
NAME
FUNCTION
CTLI
GND
VDD
FREQ
PGND2
LX2
PVDD2
CS
OS2
OS1
PVDD1
GND2
TEC Current-Control Input. Sets TEC current. Center point is 1.50V (no TEC current). The
current is given by:
ITEC = (VOS1 - VCS) / RSENSE = (VCTLI - 1.50) / (10 x RSENSE). When (VCTLI - VREF) > 0
then VOS2 > VOS1 > VCS.
Analog Ground. Star connect to PGND at underside exposed pad for TQFN package.
Analog Supply Voltage Input. Bypass VDD to GND with a 1µF ceramic capacitor.
For MAX8520: Analog FREQ Set Pin (see the Switching Frequency section).
For MAX8521: Digital FREQ Selection Pin. Connect to VDD for 1MHz operation, connect to
GND for 500kHz operation. The PWM oscillator can synchronize to FREQ by switching at
FREQ between 700kHz and 1.2MHz.
Power Ground 2. Internal synchronous rectifier ground connection. Connect all PGND
pins together at the power ground plane.
Inductor Connection. LX2 is high-impedance in shutdown.
Power Input 2. Connect all PVDD inputs together at the VDD power plane.
Current-Sense Input. The current through the TEC is monitored between CS and OS1. The
maximum TEC current is given by 150mV/RSENSE and is bipolar.
Output Sense 2. OS2 senses one side of the differential TEC voltage. OS2 is a sense
point, not a power output. OS2 discharges to ground in shutdown.
Output Sense 1. OS1 senses one side of the differential TEC voltage. OS1 is a sense
point, not a power output. OS1 discharges to ground in shutdown.
Power Input 1. Connect all PVDD inputs together at the VDD power plane.
Ground. Additional ground pads aid in heat dissipation. Short to either GND or PGND
plane.
N.C. No Connect. Connect N.C. pads to GND2 to aid in heat dissipation.
EP
Exposed Paddle (TQFN Only). Internally connected to GND. Connect to a large ground
plane to maximize thermal performance. Not intended as an electrical connection point.
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