M48T35-70PM1F Ver la hoja de datos (PDF) - STMicroelectronics

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fabricante

M48T35-70PM1F

5V, 256 Kbit (32 Kb x 8) TIMEKEEPER® SRAM

STMicroelectronics 

M48T35 M48T35Y

Figure 8. Crystal accuracy across temperature

ppm

20

Clock operations

0

-20

-40

-60

ΔF

F

= -0.038

ppm

C2

(T

-

T0)2

±

10%

T0 = 25 °C

-80

-100

0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 °C

AI02124

Figure 9. Clock calibration

NORMAL

POSITIVE

CALIBRATION

NEGATIVE

CALIBRATION

AI00594B

3.6

VCC noise and negative going transients

ICC transients, including those produced by output switching, can produce voltage

fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if

capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the

bypass capacitors will be released as low going spikes are generated or energy will be

absorbed when overshoots occur. A bypass capacitor value of 0.1µF (as shown in Figure 10

on page 16) is recommended in order to provide the needed filtering.

In addition to transients that are caused by normal SRAM operation, power cycling can

generate negative voltage spikes on VCC that drive it to values below VSS by as much as

one volt. These negative spikes can cause data corruption in the SRAM while in battery

backup mode. To protect from these voltage spikes, it is recommended to connect a

schottky diode from VCC to VSS (cathode connected to VCC, anode to VSS). Schottky diode

15/29

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