LXT9781 Ver la hoja de datos (PDF) - Intel
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LXT9781 Datasheet PDF : 78 Pages
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LXT9761/9781 — Fast Ethernet 10/100 Multi-Port Transceiver with RMII
2.8 10 Mbps Operation.............................................................................................. 37
2.8.1 Preamble Handling................................................................................. 37
2.8.2 Dribble Bits............................................................................................. 38
2.8.3 Link Test................................................................................................. 38
2.8.3.1 Link Failure................................................................................ 38
2.8.4 Jabber .................................................................................................... 38
2.9 Monitoring Operations......................................................................................... 38
2.9.1 Monitoring Auto-Negotiation................................................................... 38
2.9.2 Serial LED Functions ............................................................................. 38
2.9.3 Per-Port LED Driver Functions............................................................... 40
2.9.3.1 LED Pulse Stretching ................................................................ 40
2.9.4 Using the Quick Status Register ............................................................ 41
2.9.5 Out-of-Band Signalling ........................................................................... 42
2.10 Boundary Scan (JTAG1149.1) Functions ........................................................... 42
2.10.1 Boundary Scan Interface........................................................................ 42
2.10.2 State Machine ........................................................................................ 42
2.10.3 Instruction Register ................................................................................ 43
2.10.4 Boundary Scan Register ........................................................................ 43
3.0
Application Information......................................................................................... 44
3.1 Design Recommendations .................................................................................. 44
3.1.1 General Design Guidelines .................................................................... 44
3.1.2 Power Supply Filtering ........................................................................... 44
3.1.3 Power and Ground Plane Layout Considerations .................................. 45
3.1.3.1 Chassis Ground......................................................................... 45
3.1.4 RMII Terminations .................................................................................. 45
3.1.5 The RBIAS Pin ....................................................................................... 45
3.1.6 The Twisted-Pair Interface ..................................................................... 46
3.1.6.1 Magnetics Information ............................................................... 46
3.1.7 The Fiber Interface................................................................................. 46
3.2 Typical Application Circuits ................................................................................. 46
4.0
Test Specifications.................................................................................................. 52
5.0
Register Definitions ................................................................................................ 62
6.0
Package Specifications ......................................................................................... 77
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