LTC2614(2004) Ver la hoja de datos (PDF) - Linear Technology

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LTC2614
(Rev.:2004)

Quad 16-Bit Rail-to-Rail DACs in 16-Lead SSOP

Linear Technology 

LTC2604/LTC2614/LTC2624

PIN FUNCTIONS

SDO (Pin 10): Serial Interface Data Output. The serial

output of the shift register appears at the SDO pin. The data

transferred to the device via the SDI pin is delayed 32 SCK

rising edges before being output at the next falling edge.

This pin is used for daisy-chain operation.

CLR (Pin 11): Asynchronous Clear Input. A logic low at this

level-triggered input clears all registers and causes the

DAC voltage outputs to drop to 0V. CMOS and TTL-

compatible.

VCC (Pin 16): Supply Voltage Input. 2.5V ≤ VCC ≤ 5.5V.

BLOCK DIAGRA

GND

1

REF LO

2

REF A

3

VOUTA

4

DAC A

VOUTB

5

REF B

6

CS/LD

7

SCK

8

DAC B

CONTROL

LOGIC

DECODE

32-BIT SHIFT REGISTER

WU

W

TI I G DIAGRA

t1

t2

SCK

1

SDI

t5

t7

CS/LD

SDO

t3

t4

2

3

t8

Figure 1

DAC D

VCC

16

REF D

15

VOUT D

14

DAC C

VOUT C

13

REF C

12

CLR

11

SDO

10

SDI

9

2604 BD

t6

23

24

t10

2604 F01

2604f

9

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