LT1796
BLOCK DIAGRA
TXD 1
DRIVER
RS 8
RXD 4
VREF 5
SLOPE/
STANDBY
RX
REFERENCE
VOLTAGE
VCC
3
7 CANH
6 CANL
2
1796 BD
GND
TI I G DIAGRA S
5V
TXD
0V
VDIFFHI
VDIFF
VDIFFLO
2.5V
2.5V
VDIFF = VCANH – VCANL
50%
25%
tTXDOFF
tTXDON
1796 F02
Figure 2. Driver Delay Waveforms
3.5V
CANH
2.5V
RXD
3V
CANL = 2.5V
0.8V
3V
2V
tRXDON
tRXDOFF 1796 F04
Figure 4. Reciever Delay Waveforms
TEST CIRCUIT
5V
3
1
TXD
0.1µF
7
CANH
60Ω
4
6
RXD CANL
100pF
30pF
GND VREF RS
2 58
RS
1796 F01
Figure 1. Switching Test Circuit
5V
TXD
2.5V
2.5V
0V
RXD
2V
0.8V
0V
tLBOFF
tLBON
1796 F03
Figure 3. Loopback Delay Waveforms
5V
RS
2.5V
0V
RXD
0.8V
tWAKE
1796 F05
Figure 5. Wake Up from Standby Waveforms
FU CTIO TABLES
Driver Output
INPUTS
TXD
RS
0
VRS < 3V
0
VRS > 4V
1
VRS < 3V
1
VRS > 4V
BUS TERMINALS
CANH CANL
High
Low
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
OPERATING STATE
Dominant
Standby
Recessive
Standby
6
Receiver Output
BUS VOLTAGE
VBUS = VCANH – VCANL
VBUS < 0.5V
0.5V ≤ VBUS ≤ 0.9V
VBUS > 0.9V
VBUS < 0.5V
0.5V ≤ VBUS ≤ 0.9V
VBUS > 0.9V
RS
RXD
RESPONSE TIME
< 3V
High
Fast
< 3V Indeterminate
Fast
< 3V
Low
Fast
> 4V
High
Slow
> 4V Indeterminate
Slow
> 4V
Low
Slow
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