LPC2290FBD144 Ver la hoja de datos (PDF) - NXP Semiconductors.
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LPC2290FBD144
NXP Semiconductors.
LPC2290FBD144 Datasheet PDF : 41 Pages
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NXP Semiconductors
LPC2290
16/32-bit ARM microcontroller with external memory interface
Table 3. Pin description …continued
Symbol
Pin
Type
P1.0/CS0
91[5]
I/O
O
P1.1/OE
90[5]
I/O
O
P1.16/
34[5]
I/O
TRACEPKT0
O
P1.17/
24[5]
I/O
TRACEPKT1
O
P1.18/
15[5]
I/O
TRACEPKT2
O
P1.19/
7[5]
I/O
TRACEPKT3
O
P1.20/
102[5]
I/O
TRACESYNC
O
P1.21/
95[5]
I/O
PIPESTAT0
O
P1.22/
86[5]
I/O
PIPESTAT1
O
P1.23/
82[5]
I/O
PIPESTAT2
O
P1.24/
70[5]
I/O
TRACECLK
O
P1.25/EXTIN0 60[5]
I/O
I
P1.26/RTCK 52[5]
I/O
I/O
P1.27/TDO
144[5]
I/O
O
P1.28/TDI
140[5]
I/O
I
P1.29/TCK
126[5]
I/O
I
P1.30/TMS
113[5]
I/O
I
LPC2290_3
Product data sheet
Description
P1.0 — General purpose digital input/output pin.
CS0 — LOW-active Chip Select 0 signal.
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)
P1.1 — General purpose digital input/output pin.
OE — LOW-active Output Enable signal.
P1.16 — General purpose digital input/output pin.
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.
P1.17 — General purpose digital input/output pin.
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up.
P1.18 — General purpose digital input/output pin.
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up.
P1.19 — General purpose digital input/output pin.
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up.
P1.20 — General purpose digital input/output pin.
TRACESYNC — Trace Synchronization. Standard I/O port with internal
pull-up.
Note: LOW on this pin while RESET is LOW, enables pins P1[25:16] to
operate as Trace port after reset.
P1.21 — General purpose digital input/output pin.
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.
P1.22 — General purpose digital input/output pin.
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.
P1.23 — General purpose digital input/output pin.
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.
P1.24 — General purpose digital input/output pin.
TRACECLK — Trace Clock. Standard I/O port with internal pull-up.
P1.25 — General purpose digital input/output pin.
EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.
P1.26 — General purpose digital input/output pin.
RTCK — Returned Test Clock output. Extra signal added to the JTAG port.
Assists debugger synchronization when processor frequency varies.
Bidirectional pin with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins P1[31:26] to
operate as Debug port after reset.
P1.27 — General purpose digital input/output pin.
TDO — Test Data out for JTAG interface.
P1.28 — General purpose digital input/output pin.
TDI — Test Data in for JTAG interface.
P1.29 — General purpose digital input/output pin.
TCK — Test Clock for JTAG interface.
P1.30 — General purpose digital input/output pin.
TMS — Test Mode Select for JTAG interface.
Rev. 03 — 16 November 2006
© NXP B.V. 2006. All rights reserved.
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