LFEC15E-4F256I Ver la hoja de datos (PDF) - Lattice Semiconductor
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LFEC15E-4F256I Datasheet PDF : 163 Pages
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Lattice Semiconductor
Architecture
LatticeECP/EC Family Data Sheet
Figure 2-1. Simplified Block Diagram, LatticeEC Device (Top Level)
Programmable I/O Cell
(PIC) includes sysIO
Interface
sysMEM Embedded
Block RAM (EBR)
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
JTAG Port
PFF (PFU without
RAM)
sysCLOCK PLL
Programmable
Functional Unit (PFU)
Figure 2-2. Simplified Block Diagram, LatticeECP-DSP Device (Top Level)
Programmable I/O Cell
(PIC) includes sysIO
Interface
sysMEM Embedded
Block RAM (EBR)
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
sysDSP Block
Programmable
Functional Unit (PFU)
2-2
JTAG Port
PFF (Fast PFU
without RAM/ROM)
sysCLOCK PLL
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