ISL6410IUZ Ver la hoja de datos (PDF) - Intersil

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ISL6410IUZ

Single Synchronous Buck Regulators with Integrated FET

Intersil 

Functional Block Diagram for QFN Version

VIN

10µF

16 VIN

3 GND

9 SYNC

7 VSET

10 EN

SOFT

START

SLOPE

COMPENSATION

EA

GM

EN

PWM

OVERCURRENT,

OVERVOLTAGE

LOGIC

COMPENSATION

CURRENT

SENSE

GATE

DRIVE

750kHz

OSCILLATOR

POWER GOOD

PWM

VOUT

UVLO

PWM

REFERENCE

0.45V

VIN

RESET

BLOCK

4 PG

8 PG

2 CT

PVCC 15

0.1µF

L1

8.2µH

L 14

VOUT

10µF

PGND 13

11

RESET

FB 5

NOTES:

1. VIN is 3.3V for ISL6410 and 5.0V for ISL6410A.

2. VSET in the above schematic is connected to VIN, so the VOUT is 1.8V for ISL6410 and 3.3V for ISL6410A.

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