IS61NLF102418 Ver la hoja de datos (PDF) - Integrated Silicon Solution

Número de pieza

componentes Descripción

fabricante

IS61NLF102418

256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH "NO WAIT" STATE BUS SRAM

Integrated Silicon Solution 

IS61NLF25672/IS61NVF25672

IS61NLF51236/IS61NVF51236

IS61NLF102418/IS61NVF102418

ASYNCHRONOUS TRUTH TABLE(1)

Operation

ZZ

OE

I/O STATUS

Sleep Mode

H

X

High-Z

Read

L

L

L

H

DQ

High-Z

Write

L

X

Din, High-Z

Deselected

L

X

High-Z

Notes:

1. X means "Don't Care".

2. For write cycles following read cycles, the output buffers must be disabled with OE, otherwise data bus

contention will occur.

3. Sleep Mode means power Sleep Mode where stand-by current does not depend on cycle time.

4. Deselected means power Sleep Mode where stand-by current depends on cycle time.

ISSI ®

WRITE TRUTH TABLE (x18)

Operation

WE

BWa

BWb

READ

H

X

X

WRITE BYTE a

L

L

H

WRITE BYTE b

L

H

L

WRITE ALL BYTEs

L

L

L

WRITE ABORT/NOP

L

H

H

Notes:

1. X means "Don't Care".

2. All inputs in this table must beet setup and hold time around the rising edge of CLK.

WRITE TRUTH TABLE (x36)

Operation

WE

BWa BWb BWc BWd

READ

H

X

X

X

X

WRITE BYTE a

L

L

H

H

H

WRITE BYTE b

L

H

L

H

H

WRITE BYTE c

L

H

H

L

H

WRITE BYTE d

L

H

H

H

L

WRITE ALL BYTEs

L

L

L

L

L

WRITE ABORT/NOP

L

H

H

H

H

Notes:

1. X means "Don't Care".

2. All inputs in this table must beet setup and hold time around the rising edge of CLK.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

9

Rev. B

08/26/05

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