WRITE CYCLE 2 (DCS or TCS Controlled, See Notes 1 and 2)
–12
Parameter
Symbol
Min
Max
Address Setup Time
A0 Setup Time
Address Valid to End of Write
A0 Valid to End of Write
Data/Tag Enable to End of Write
tAVEL
0
—
tA0VEL
0
—
tAVEH
12
—
tA0VEH
10
—
tELEH,
12
—
tELWH
Data Valid to End of Write
tDVEH
6
—
Data Hold Time
tEHDX
5
—
Write Recovery Time
tEHAX
5
—
Write Recovery Time — A0
tEHA0X
5
—
NOTES:
1. A write occurs during the overlap of DCS or TCS low and WE low.
2. Enable timings are the same for both DCS and TCS.
–15
Min
Max
0
—
0
—
15
—
12
—
15
—
7
—
5
—
5
—
5
—
–17
Min
Max
0
—
0
—
17
—
14
—
17
—
8
—
5
—
5
—
5
—
Unit Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
A1 – A17
A0
DCS/TCS
(DATA/TAG ENABLE)
WE (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 2
tAVEH
tA0VEH
tA0VEL
tAVEL
tELEH
tELWH
tEHAX
tEHA0X
HIGH–Z
tDVEH
DATA VALID
tEHDX
MOTOROLA FAST SRAM
MCM44256B SERIES
7