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HI-8470(2013) Ver la hoja de datos (PDF) - Holt Integrated Circuits

Número de pieza
componentes Descripción
fabricante
HI-8470
(Rev.:2013)
HOLTIC
Holt Integrated Circuits 
HI-8470 Datasheet PDF : 19 Pages
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HI-8470
FUNCTIONAL DESCRIPTION
OVERVIEW
The HI-8470 has 16 Sense channels that are individually
programmed for either GND/OPEN or SUPPLY/OPEN de-
tection. The programming of each channel is set by strapping
the appropriate SEL pin. There are 16 SENSE INPUT pins
(SI15:0) with 16 corresponding SEL strap pins (SEL15:0).
The window comparator for detecting the state of the SENSE
INPUT is offered with a choice of either standard internal
voltage thresholds or, by option pins, the thresholds can be
supplied externally. The choice of standard internal or exter-
nal thresholds is selectable for each of the two sense func-
tions, GND/OPEN and VOLTAGE/OPEN. If an external op-
tion is chosen, there are two pins for each function to input a
HIGH or LOW level for thresholds. It is possible to set either
of the external thresholds to logic levels such that a particular
SEL option can function as digital state detection.
The HI-8470 has an onboard ARINC 429 transmitter. An on-
chip DC-DC converter provides 3.3V-only operation, or ex-
ternal +6V and -6V power supplies may be connected. This
selection is controlled by the voltage provided at the VDD
pin.
The discrete sense pins and line driver outputs are lightning
protected to RTCA/DO-160G, Section 22 Level 3 Pin
Injection Test Waveform Set A (3 & 4), Set B (3 & 5A) and Set
Z (3 & 5B) without the use of any external components.
Logic and digital inputs and outputs operate from the
VLOGIC supply.
A 1MHz clock must be provided at the CLKIN pin to operate
the ARINC 429 transmitter. The Master Reset (MR) pin is
ORed with an on-chip Power On Reset (POR).
The SPEED pin selects the speed of the ARINC 429 trans-
mission.
When set from logic 0 to logic 1, the TXENB input pin trig-
gers ARINC 429 word transmission. The ARINC 429 trans-
mitter is disabled when TXENB is held at logic 0. When
TXENB is held at logic 1, periodic ARINC 429 word trans-
mission occurs at a fixed interval programmed by eight
input pins TMR7:0. When the TMR7:0 value ranges from 1
to 255 decimal, the word re-transmit interval equals TMR
value x 10 milliseconds, or 10 to 2,550 ms.
Unique case:
When TMR7:0 equals zero, the ARINC 429 word re-
transmission interval depends on the state of the SPEED
input pin: For SPEED equals 0 (low-speed, 12.5Kb/s) the
shortest interval is 2.88 ms when TMR7:0 equals 0. For
SPEED equals 1 (high-speed, 100 Kb/s) the shortest re-
transmission interval is 360 us when TMR7:0 equals 0.
After a detected Power On Reset, transmission is disabled
for 500 ms to prevent spurious and possibly erroneous
data.
The sense data for each of the 16 channels is transmitted
directly in an ARINC 429 word. The label value is set by the
eight Label input pins (LBL7:0). 2 pins (BIT9 and BIT10)
configure the transmitted ARINC 429 SD bits. To allow
additional flexibility, the last five bits of the ARINC 429 word
are configured by the five BIT31:27 pins. Bits 11 through
26 of the ARINC 429 transmission have 16 bits of data
mapped from the SENSE INPUT detections. The 32nd bit
is odd parity. Note that the five bits of data set by the
BIT31:27 pins could alternatively be used for detection and
transmission of logic levels within the system.
Two pins (TEST1 and TEST0) provide a means of self test.
If TEST0 is taken high, all comparator inputs are forced to
ground and if TEST1 is taken high, all comparator inputs
are forced high. If both self test inputs are high, the result is
an alternating pattern with SI0 comparator input forcing a
high input, Si1 forcing a ground input, etc.
HOLT INTEGRATED CIRCUITS
6

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