HI-3182CD-T Ver la hoja de datos (PDF) - Holt Integrated Circuits
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HI-3182CD-T Datasheet PDF : 12 Pages
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HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3188
HI-318X PACKAGE THERMAL CHARACTERISTICS
PACKAGE STYLE1
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
MAXIMUM ARINC LOAD 3, 6, 7
HEAT SINK
ØJA
(°C/W)
SUPPLY CURRENT2
Unsoldered
82
20 mA
Soldered
65
20 mA
JUNCTION TEMPERATURE, Tj
TA = 25°C TA = 85°C TA = 125°C
57°C
117°C
157°C
51°C
111°C
151°C
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
28-pin Plastic
Unsoldered
51
Soldered
28
N/A
70
20 mA
20 mA
25 mA
45°C
36°C
56°C
105°C
96°C
110°C
145°C
136°C
150°C
PACKAGE STYLE1
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
28-pin Plastic
AOUT and BOUT Shorted to Ground 3, 4, 5, 6, 7
HEAT SINK
ØJA
(°C/W)
JUNCTION TEMPERATURE, Tj
SUPPLY CURRENT2
TA = 25°C TA = 85°C TA = 125°C
Unsoldered
82
36 mA
57°C
147°C
187°C
Soldered
65
36 mA
78°C
138°C
178°C
Unsoldered
51
Soldered
28
40 mA
40 mA
64°C
53°C
124°C
113°C
164°C
153°C
N/A
70
63 mA
100°C
150°C
182°C
Notes:
1. All data taken in still air on devices soldered to a single layer copper PCB (3" X 4.5" X .062").
2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.
3. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
4. Similar results would be obtained with AOUT shorted to BOUT.
5. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
6. Data will vary depending on air flow and the method of heat sinking employed.
7. Current values listed are for each of the +V and -V supplies.
HEAT SINK - ESOIC PACKAGES
Both the 14-pin and 16-pin thermally enhanced SOIC dissipation. The heat sink is electrically isolated from the
packages are used for HI-318X products. These ESOIC chip and can be soldered to any ground or power plane.
packages include a metal heat sink located on the bottom However, since the chip’s substrate is at +V, connecting
surface of the device. This heat sink should be soldered the heat sink to this power plane is recommended to avoid
down to the printed circuit board for optimum thermal coupling noise into the circuit.
HOLT INTEGRATED CIRCUITS
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