Philips Semiconductors
Dual 4-channel analogue multiplexer/demultiplexer
Product specification
HEF4052B
MSI
Fig.3 Schematic diagram (one switch).
FUNCTION TABLE
INPUTS
E
A1
A0
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
CHANNEL
ON
Y0A−ZA; Y0B−ZB
Y1A−ZA; Y1B−ZB
Y2A−ZA; Y2B−ZB
Y3A−ZA; Y3B−ZB
none
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage (with reference to VDD)
VEE
−18 to + 0,5 V
Note
1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed VDD or VEE.
January 1995
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