HCF40208BM1(2002) Ver la hoja de datos (PDF) - STMicroelectronics
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HCF40208BM1 Datasheet PDF : 11 Pages
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HCF40208B
4 x 4 MULTIPORT REGISTER
s ONE INPUT AND TWO OUTPUT BUSES
s UNLIMITED EXPANSION IN BIT AND WORD
DIRECTION
s DATA LINES HAVE LATCHED INPUTS
s 3-STATE OUTPUTS
s SEPARATE CONTROL OF EACH BUS,
ALLOWING SIMULTANEOUS
INDEPENDENT READING AND ANY OF
FOUR REGISTERS ON BUS A AND BUS B
AND INDEPENDENT WRITING INTO ANY
OF THE FOUR REGISTERS
s 40208B IS PIN-COMPATIBLE WITH
INDUSTRY TYPE MC14580
s STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
s QUIESCENT CURRENT SPECIF. UP TO 20V
s 5V, 10V AND 15V PARAMETRIC RATINGS
s INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
s 100% TESTED FOR QUIESCENT CURRENT
s MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF40208B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in SOP packages.
HCF40208B is a 4 x 4 multiport register containing
PIN CONNECTION
SOP
ORDER CODES
PACKAGE
TUBE
SOP
HCF40208BM1
T&R
HCF40208M013TR
four 4-bit registers, a write address decoder, two
separate read address decoders, and two 3-state
output buses. When the ENABLE input is low, the
corresponding output bus is switched,
independently of the clock, to a high impedance
state. The high impedance third state provides the
outputs with the capability of being connected to
the bus lines in a bus organized system without
the need for interface or pull-up components.
When the WRITE ENABLE input is high, all data
input lines are latched on the positive transition of
the CLOCK and the data is entered into the word
selected by the write address lines. When WRITE
ENABLE is low, the CLOCK is inhibited and no
new data is entered. In either case, the contents of
any word may be accessed via the read address
lines independent of the state of the CLOCK input.
September 2002
1/11
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