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EL4584CSZ

Horizontal Genlock, 4FSC

Intersil 

Block Diagram

EL4584

Description Of Operation

The horizontal sync signal (CMOS level, falling leading

edge) is input to HSYNC input (pin 10). This signal is delayed

about 110ns, the falling edge of which becomes the

reference to which the clock output will be locked. (See

timing diagrams.) The clock is generated by the signal on pin

5, OSC in. There are 2 general types of VCO that can be

used with the EL4584, LC and crystal controlled.

Additionally, each type can be either built up using discrete

components, including a varactor as the frequency

controlling element, or complete, self contained modules can

be purchased with everything inside a metal can. The

modules are very forgiving of PCB layout, but cost more than

discrete solutions. The VCO or VCXO is used to generate

the clock. An LC tank resonator has greater “pull” than a

crystal controlled circuit, but will also be more likely to drift

over time, and thus will generate more jitter. The “pullability”

of the circuit refers to the ability to “pull” the frequency of

oscillation away from its center frequency by modulating the

voltage on the control pin of a VCO module or varactor, and

is a function of the slope and range of the capacitance-

voltage curve of the varactor or VCO module used. The VCO

signal is sent to a divide by N counter, and to the CLK out

pin. The divisor N is determined by the state of pins 1,2, and

16 and is described in table 1 above. The divided signal is

sent, along with the delayed Hsync input, to the

phase/frequency detector, which compares the two signals

for phase and frequency differences. Any phase difference is

converted to a current at the charge pump output FILTER

(pin 7). A VCO with positive frequency deviation with control

voltage must be used. Varactors have negative capacitance

slope with voltage, resulting in positive frequency deviation

with control voltage for the oscillators in figures 10 and 11.

VCO

The VCO should be tuned so its frequency of oscillation is

very close to the required clock output frequency when the

voltage on the varactor is 2.5 volts. VCXO and VCO

7

modules are already tuned to the desired frequency, so this

step is not necessary if using one of these units. The range

of the charge pump output (pin 7) is 0 to 5 volts and it can

source or sink a maximum of about 300µA, so all frequency

control must be accomplished with variable capacitance

from the varactor within this range. Crystal oscillators are

more stable than LC oscillators, which translates into lower

jitter, but LC oscillators can be pulled from their mid-point

values further, resulting in a greater capture and locking

range. If the incoming horizontal sync signal is known to be

very stable, then a crystal oscillator circuit can be used. If the

HSYNC signal experiences frequency variations of greater

than about 300ppm, an LC oscillator should be considered,

as crystal oscillators are very difficult to pull this far. When

HSYNC input frequency is greater than CLK frequency ÷ N,

charge pump output (pin 7) sources current into the filter

capacitor, increasing the voltage across the varactor, which

lowers its capacitance, thus tending to increase VCO

frequency. Conversely, filter output pulls current from the

filter capacitor when HSYNC frequency is less than CLK ÷ N,

forcing the VCO frequency lower.

Loop Filter

The loop filter controls how fast the VCO will respond to a

change in filter output stimulus. Its components should be

chosen so that fast lock can be achieved, yet with a

minimum of VCO “hunting”, preferably in one to two

oscillations of charge pump output, assuming the VCO

frequency starts within capture range. If the filter is under-

damped, the VCO will over and under-shoot the desired

operating point many times before a stable lock takes place.

It is possible to under-damp the filter so much that the loop

itself oscillates, and VCO lock is never achieved. If the filter

is over-damped, the VCO response time will be excessive

and many cycles will be required for a lock condition. Over-

damping is also characterized by an easily unlocked system

because the filter can’t respond fast enough to perturbations

in VCO frequency. A severely over damped system will

seem to endlessly oscillate, like a very large mass at the end

FN7174.2

July 25, 2005

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