LTC1283ACN Ver la hoja de datos (PDF) - Linear Technology

Número de pieza

componentes Descripción

fabricante

LTC1283ACN

3V Single Chip 10-Bit Data Acquisition System

Linear Technology 

LTC1283

APPLICATI S I FOR ATIO

when operating at low values of VREF because of the

reduced LSB step size and the resulting higher accuracy

requirement placed on the converter. The following factors

must be considered when operating at low VREF values.

1. Conversion speed (ACLK frequency)

2. Offset

3. Noise

Conversion Speed with Reduced VREF

With reduced reference voltages, the LSB step size is

reduced and the LTC1283 internal comparator overdrive

is reduced. With less overdrive, more time is required to

perform a conversion. Therefore, the maximum ACLK

frequency should be reduced when low values of VREF are

used. This is shown in the typical curve of Maximum

Conversion Clock Rate vs Reference Voltage.

Offset with Reduced VREF

The offset of the LTC1283 has a larger effect on the output

code when the A/D is operated with reduced reference

voltage. The offset (which is typically a fixed voltage)

becomes a larger fraction of an LSB as the size of the LSB

is reduced. The typical curve of Unadjusted Offset Error vs

Reference Voltage shows how offset in LSBs is related to

reference voltage for a typical value of VOS. For example,

a VOS of 0.5mV which is 0.2LSB with a 2.5V reference

becomes 0.5LSB with a 1V reference and 2.5LSBs with a

0.2V reference. If this offset is unacceptable, it can be

corrected digitally by the receiving system or by offsetting

the “–” input to the LTC1283.

Noise with Reduced VREF

The total input referred noise of the LTC1283 can be

reduced to approximately 200µV peak-to-peak using a

ground plane, good bypassing, good layout techniques

and minimizing noise on the reference inputs. This noise

is insignificant with a 2.5V reference but will become a

larger fraction of an LSB as the size of the LSB is reduced.

The typical curve of Noise Error vs Reference Voltage

shows the LSB contribution of this 200µV of noise.

For operation with a 2.5V reference, the 200µV noise is only

0.08LSB peak-to-peak. In this case, the LTC1283 noise will

contribute virtually no uncertainty to the output code.

However, for reduced references, the noise may become a

significant fraction of an LSB and cause undesirable jitter in

the output code. For example, with a 1V reference, this same

200µV noise is 0.2LSB peak-to-peak. This will reduce the

range of input voltages over which a stable output code can

be achieved by 0.2LSB. If the reference is further reduced to

200mV, the 200µV noise becomes equal to one LSB and a

stable code may be difficult to achieve. In this case averag-

ing readings may be necessary.

This noise data was taken in a very clean setup. Any setup

induced noise (noise or ripple on VCC, VREF, VIN or V –) will

add to the internal noise. The lower the reference voltage to

be used, the more critical it becomes to have a clean, noise-

free setup.

A “Quick Look” Circuit for the LTC1283

Users can get a quick look at the function and timing of the

LTC1283 by using the following simple circuit. REF + and

DIN are tied to VCC selecting a 3V input span, CH7 as a

single-ended input, unipolar mode, MSB-first format and

16-bit word length. ACLK and SCLK are tied together and

driven by an external clock. CS is driven at 1/64 the clock

rate by the CD4520 and DOUT outputs the data. All other

pins are tied to a ground plane. The output data from the

DOUT pin can be viewed on an oscilloscope which is set up

to trigger on the falling edge of CS.

Scope Trace of LTC1283 “Quick Look” Circuit

Showing A/D Output of 0101010101 (155HEX)

CS

DOUT

DEGLITCHER

TIME

MSB

LSB

FILLS

(B9)

(B0)

ZEROES

VERTICAL: 1V/DIV, HORIZONTAL: 5µs/DIV

21

Share Link: