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DS2764

High-Precision Li+ Battery Monitor with 2-Wire Interface

Maxim Integrated 

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DS2764 High-Precision Li+ Battery Monitor With 2-Wire Interface

The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.

This device internally provides a hold time of at least 300 ns for the SDA signal (referred to the VIHmin of the SCL

signal) to bridge the undefined region of the falling edge of SCL.

Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.

CB¾ total capacitance of one bus line in pF.

Figure 1. I2C Bus Timing Diagram

SDA

tF

tLOW

tR

tSU;DAT

SCL

S

tHD;STA

tHD;DAT

tF

tHD;STA

tSU;STA

Sr

tSP

tR

tBUF

tSU;STO

P

S

I2C is a trademark of Philips Corp. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated

Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system

conforms to the I2C Standard Specification as defined by Philips.

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