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DM74AS245WM Datasheet PDF : 5 Pages
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October 1986
Revised February 2000
DM74AS245
Octal Bus Transceiver with 3-STATE Outputs
General Description
This advanced Schottky device contains 8 pairs of
3-STATE logic elements configured as octal bus transceiv-
ers. These circuits are designed for use in memory, micro-
processor systems and in asynchronous bidirectional data
buses. Two way communication between buses is con-
trolled by the (DIR) input. Data transmits either from the A
bus to the B bus or from the B bus to the A bus. Both the
driver and receiver outputs can be disabled via the (G)
enable input which causes outputs to enter the high imped-
ance mode so that the buses are effectively isolated.
Features
s Advanced oxide-isolated, ion-implanted Schottky
TTL process
s Non-inverting logic output
s 3-STATE outputs independently controlled on
A and B buses
s Low output impedance to drive terminated transmission
lines to 133Ω
s Switching response specified into 500Ω/50 pF
s Specified to interface with CMOS at VOH = VCC − 2V
s PNP inputs reduce input loading
s Switching specifications guaranteed over full
temperature and VCC range
Ordering Code:
Order Number Package Number
Package Description
DM74AS245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS245SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74AS245N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Control
Inputs
G
DIR
L
L
L
H
H
X
Operation
B Data to A Bus
A Data to B Bus
Hi-Z
© 2000 Fairchild Semiconductor Corporation DS006299
www.fairchildsemi.com
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