LIST OF FIGURES (6/6)
Figure No.
Title
Page
16-12
16-13
16-14
16-15
16-16
16-17
16-18
16-19
Interrupt Request Acknowledge Processing Algorithm ................................................................. 351
Interrupt Request Acknowledgment Timing (Minimum Time) ....................................................... 352
Interrupt Request Acknowledgment Timing (Maximum Time) ...................................................... 352
Multiple Interrupt Servicing Example .............................................................................................. 354
Interrupt Request Hold .................................................................................................................... 356
Basic Configuration of Test Function ............................................................................................. 357
Format of Interrupt Request Flag Register 0H .............................................................................. 358
Format of Interrupt Mask Flag Register 0H ................................................................................... 358
17-1
17-2
17-3
17-4
17-5
Format of Oscillation Stabilization Time Select Register .............................................................. 360
HALT Mode Release by Interrupt Request Generation ................................................................ 362
HALT Mode Release by RESET Input ........................................................................................... 363
STOP Mode Release by Interrupt Request Generation ................................................................ 365
STOP Mode Release by RESET Input .......................................................................................... 366
18-1
18-2
18-3
18-4
Block Diagram of Reset Function ................................................................................................... 367
Timing of Reset by RESET Input ................................................................................................... 368
Timing of Reset due to Watchdog Timer Overflow ....................................................................... 368
Timing of Reset by RESET Input in STOP Mode .......................................................................... 368
19-1
19-2
19-3
19-4
19-5
19-6
19-7
Format of Internal Memory Size Switching Register (IMS) ........................................................... 373
Format of Internal Expansion RAM Size Switching Register ........................................................ 374
Page Program Mode Flowchart ...................................................................................................... 377
Page Program Mode Timing ........................................................................................................... 378
Byte Program Mode Flowchart ....................................................................................................... 379
Byte Program Mode Timing ............................................................................................................ 380
PROM Read Timing ........................................................................................................................ 381
B-1
Configuration of Development Tools .............................................................................................. 400
B-2
EV-9200GF-100 Package Drawing (for Reference Purposes only) ............................................. 409
B-3
Recommended Footprint for EV-9200GF-100 (for Reference Purposes only) ............................ 410
B-4
Distance Between IE System and Conversion Adapter ................................................................ 411
B-5
Connection Conditions of Target System (When NP-100GF-TQ Is Used) .................................. 412
B-6
Connection Conditions of Target System (When NP-H100GF-TQ Is Used) ............................... 412
User’s Manual U11302EJ4V0UM
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