CY8C3865LTI-032(2011_03) Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY8C3865LTI-032 Datasheet PDF : 129 Pages
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PSoC® 3: CY8C38 Family
Data Sheet
17. Revision History
Description Title: PSoC® 3: CY8C38 Family Data Sheet Programmable System-on-Chip (PSoC®)
Document Number: 001-11729
Rev.
ECN No.
Submission
Date
Orig. of
Change
Description of Change
**
571504 See ECN
HMT New data sheet for new device Part Number family.
*A
754416 See ECN
HMT Prepare Preliminary for PR1.
*B
2253366 See ECN
DSG Prepare Preliminary2 for PR3--total rewrite.
*C
2350209 See ECN
DSG Minor change: Added “Confidential” watermark. Corrected typo on 68QFN
pinout: pin 13 XREF to XRES.
*D
2481747 See ECN
SFV Changed part numbers and data sheet title.
*E
2521877 See ECN
DSG Prelim3 release–extensive spec, writing, and formatting changes
*F
2660161 02/16/09
GDK Reorganized content to be consistent with the TRM. Added Xdata Space Access
SFRs and DAC sections. Updated Boost Converter section and Conversion
Signals section. Classified Ordering Information according to CPU speed;
added information on security features and ROHS compliance
Added a section on XRES Specifications under Electrical Specification.
Updated Analog Subsystem and CY8C35/55 Architecture block diagrams.
Updated Electrical Specifications. Renamed CyDesigner as PSoC Creator
*G
2712468 05/29/09 MKEA Updates to Electrical Specifications. Added Analog Routing section
Updates to Ordering Information table
*H
2758970 09/02/09 MKEA Updated Part Numbering Conventions. Added Section 11.7.5 (EMIF Figures
and Tables). Updated GPIO and SIO AC specifications. Updated XRES Pin
Description and Xdata Address Map specifications. Updated DFB and
Comparator specifications. Updated PHUB features section and RTC in sleep
mode. Updated IDAC and VDAC DC and Analog Global specifications
Updated USBIO AC and Delta Sigma ADC specifications. Updated PPOR and
Voltage Monitors DC specifications. Updated Drive Mode diagram
Added 48-QFN Information. Updated other electrical specifications
*I
2824546 12/09/09 MKEA Updated I2C section to reflect 1 Mbps. Updated Table 11-6 and 11- 7 (Boost AC
and DC specs); also added Shottky Diode specs. Changed current for
sleep/hibernate mode to include SIO; Added footnote to analog global specs.
Updated Figures 1-1, 6-2, 7-14, and 8-1. Updated Table 6-2 and Table 6-3
(Hibernate and Sleep rows) and Power Modes section. Updated GPIO and SIO
AC specifications. Updated Gain error in IDAC and VDAC specifications.
Updated description of VDDA spec in Table 11-1 and removed GPIO Clamp
Current parameter. Updated number of UDBs on page 1.
Moved FILO from ILO DC to AC table.
Added PCB Layout and PCB Schematic diagrams.
Updated Fgpioout spec (Table 11-9). Added duty cycle frequency in PLL AC
spec table. Added note for Sleep and Hibernate modes and Active Mode specs
in Table 11-2. Linked URL in Section 10.3 to PSoC Creator site.
Updated Ja and Jc values in Table 13-1. Updated Single Sample Mode and Fast
FIR Mode sections. Updated Input Resistance specification in Del-Sig ADC
table. Added Tio_init parameter. Updated PGA and UGB AC Specs. Removed
SPC ADC. Updated Boost Converter section.
Added section 'SIO as Comparator'; updated Hysteresis spec (differential
mode) in Table 11-10.
Updated VBAT condition and deleted Vstart parameter in Table 11-6.
Added 'Bytes' column for Tables 4-1 to 4-5.
*J
2873322 02/04/10
MKEA Changed maximum value of PPOR_TR to '1'. Updated VBIAS specification.
Updated PCB Schematic. Updated Figure 8-1 and Figure 6-3. Updated Interrupt
Vector table, Updated Sales links. Updated JTAG and SWD specifications.
Removed Jp-p and Jperiod from ECO AC Spec table. Added note on sleep timer
in Table 11-2. Updated ILO AC and DC specifications. Added Resolution
parameter in VDAC and IDAC tables. Updated IOUT typical and maximum
values. Changed Temperature Sensor range to –40 °C to +85 °C. Removed
Latchup specification from Table 11-1.
Document Number: 001-11729 Rev. *R
Page 125 of 129
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