CY7C1345G(2007) Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1345G Datasheet PDF : 20 Pages
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CY7C1345G
Capacitance
Tested initially and after any design or process change that may affect these parameters.
Parameter
CIN
CCLK
CIO
Description
Input Capacitance
Clock Input Capacitance
Input or Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
100 TQFP
Max
5
5
5
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Test conditions follow
standard test methods and
procedures for measuring
thermal impedance, per
EIA/JESD51.
100 TQFP
Package
30.32
6.85
AC Test Loads and Waveforms
119 BGA
Max
5
5
7
119 BGA
Package
34.1
14.0
Unit
pF
pF
pF
Unit
°C/W
°C/W
3.3V I/O Test Load
OUTPUT
Z0 = 50Ω
3.3V
OUTPUT
RL = 50Ω
5 pF
VT = 1.5V
(a)
INCLUDING
JIG AND
SCOPE
2.5V I/O Test Load
OUTPUT
2.5V
Z0 = 50Ω
OUTPUT
RL = 50Ω
5 pF
VT = 1.25V
INCLUDING
JIG AND
(a)
SCOPE
R = 317Ω
R = 351Ω
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
90%
10%
≤ 1ns
(b)
(c)
R = 1667Ω
R = 1538Ω
VDDQ
GND
10%
≤ 1 ns
ALL INPUT PULSES
90%
90%
10%
≤ 1 ns
(b)
(c)
Document Number: 38-05517 Rev. *E
Page 11 of 20
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