CY7C1345F
Electrical Characteristics Over the Operating Range (continued) [8, 9]
Parameter
Description
ISB3
Automatic CE Power-down
Current—CMOS Inputs
ISB4
Automatic CE Power-down
Current—TTL Inputs
CY7C1345F
Test Conditions
Min. Max.
Max. VDD, Device Deselected, 7.5-ns cycle, 133 MHz
75
VIN ≥ VDDQ – 0.3V or VIN ≤ 0.3V, 8.0-ns cycle, 117 MHz
70
f = fMAX, inputs switching
10-ns cycle, 100 MHz
65
15-ns cycle, 66 MHz
45
Max. VDD, Device Deselected, All speeds
45
VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,
f = 0, inputs static
Unit
mA
mA
mA
mA
mA
Thermal Resistance[10]
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Test conditions follow standard
test methods and procedures for
measuring thermal impedance,
per EIA / JESD51.
TQFP
Package
41.83
9.99
BGA
Package
47.63
11.71
Unit
°C/W
°C/W
Capacitance[10]
Parameter
CIN
CCLK
CI/O
Description
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
TQFP
Package
5
5
5
BGA
Package
Unit
5
pF
5
pF
7
pF
AC Test Loads and Waveforms
3.3V I/O Test Load
OUTPUT
Z0 = 50Ω
3.3V
OUTPUT
RL = 50Ω
5 pF
VL = 1.5V
(a)
2.5V I/O Test Load
INCLUDING
JIG AND
SCOPE
R = 317Ω
R = 351Ω
(b)
VDD
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
90%
10%
≤ 1ns
(c)
OUTPUT
Z0 = 50Ω
2.5V
OUTPUT
RL = 50Ω
5 pF
VL = 1.25V
(a)
INCLUDING
JIG AND
SCOPE
R = 1667Ω
R =1538Ω
VDD
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
90%
10%
≤ 1ns
(b)
(c)
Note:
10. Tested initially and after any design or process change that may affect these parameters.
Document #: 38-05214 Rev. *C
Page 9 of 17