STA500(2003) Ver la hoja de datos (PDF) - STMicroelectronics
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fabricante
STA500 Datasheet PDF : 10 Pages
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STA500
Figure 1. Test Circuit.
Low current dead time = MAX(DTr,DTf)
Duty cycle = 50%
INxY
+Vcc
M58
OUTxY
M57
gnd
OUTxY
Vcc
(3/4)Vcc
(1/2)Vcc
(1/4)Vcc
t
DTr
DTf
R 8Ω
+
-
V67 =
vdc = Vcc/2
D03AU1458
Figure 2.
+VCC
Figure 3.
Duty cycle=A
DTin(A)
INxA
INxA
Q1
OUTxA
Q2
OUTxB
Q3
Q4
GND
D00AU1134
INxB
High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+VCC
DTout(A)
M58
Q1
OUTxA
Rload=8Ω
Q2
M64
DTout(B)
OUTxB
L67 22µ
Iout=3.5A
L68 22µ
Iout=3.5A
M57
Q3
C69
470nF
C71 470nF
C70
470nF
Q4
M63
Duty cycle=B
DTin(B)
INxB
Duty cycle A and B: Fixed to have DC output current of 3.5A in the direction shown in figure
D00AU1162
6/10
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