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BD5333

Free Delay Time Setting CMOS Voltage Detector IC Series

ROHM Semiconductor 

BD52□□G, BD52□□FVE, BD53□□G, BD53□□FVE series

 Block Diagrams

BD52□□G/FVE

VDD

BD53□□G/FVE

VDD

Vref

GND

CT

Fig.1

TOP VIEW

VOUT

Vref

GND

CT

Fig.2

TOP VIEW

Technical Note

VOUT

PIN No.

1

2

3

4

5

SSOP5

Symbol

Function

VOUT

Reset Output

VDD

Power Supply Voltage

GND

GND

N.C.

Unconnected Terminal

Capacitor connection terminal for

CT

output delay time

PIN No.

1

2

VSOF5

Symbol

VOUT

SUB

Function

Reset Output

Substrate*

Capacitor connection terminal for

3

CT

output delay time

4

GND

GND

5

VDD

Power Supply Voltage

*Connect the substrate to GND.

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© 2009 ROHM Co., Ltd. All rights reserved.

2009.06 - Rev.B

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