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ATF16V8B-25SC

High Performance Flash PLD

Atmel Corporation 

Electronic Signature Word

There are 64 bits of programmable memory that are al-

ways available to the user, even if the device is secured.

These bits can be used for user-specific data.

Programming/Erasing

Programming/erasing is performed using standard PLD

programmers. See CMOS PLD Programming Hardware &

Software Support for information on software/program-

ming.

Input Diagram

Input and I/O Pull-Ups

All ATF16V8B family members have internal input and I/O

pull-up resistors. Therefore, whenever inputs or I/Os are

not being driven externally, they will float to VCC. This en-

sures that all logic array inputs are at known states.

These are relatively weak active pull-ups that can easily

be overdriven by TTL-compatible drivers (see input and

I/O diagrams below).

I/O Diagram

Functional Logic Diagram Description

The Logic Option and Functional Diagrams describe the

ATF16V8B architecture. Eight configurable macrocells

can be configured as a registered output, combinatorial

I/O, combinatorial output, or dedicated input.

The ATF16V8B can be configured in one of three different

modes. Each mode makes the ATF16V8B look like a dif-

ferent device. Most PLD compilers can choose the right

mode automatically. The user can also force the selection

by supplying the compiler with a mode selection. The de-

termining factors would be the usage of register versus

combinatorial outputs and dedicated outputs versus out-

puts with output enable control.

The ATF16V8B universal architecture can be pro-

grammed to emulate many 20-pin PAL devices. These

Compiler Mode Selection

architectural subsets can be found in each of the configu-

ration modes described in the following pages. The user

can download the listed subset device JEDEC program-

ming file to the PLD programmer, and the ATF16V8B can

be configured to act like the chosen device. Check with

your programmer manufacturer for this capability.

Unused product terms are automatically disabled by the

compiler to decrease power consumption. A Security

Fuse, when programmed, protects the content of the

ATF16V8B. Eight bytes (64 fuses) of User Signature are

accessible to the user for purposes such as storing project

name, part number, revision, or date. The User Signature

is accessible regardless of the state of the Security Fuse.

Registered

ABEL, Atmel-ABEL

P16V8R

CUPL

LOG/iC

G16V8MS

GAL16V8_R (1)

OrCAD-PLD

“Registered”

PLDesigner

P16V8R

Tango-PLD

G16V8R

Note: 1. Only applicable for version 3.4 or lower.

Complex

P16V8C

G16V8MA

GAL16V8_C7 (1)

“Complex”

P16V8C

G16V8C

Simple

P16V8AS

G16V8AS

GAL16V8_C8 (1)

“Simple”

P16V8C

G16V8AS

Auto Select

P16V8

G16V8A

GAL16V8

GAL16V8A

P16V8A

G16V8

1-12

ATF16V8B

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