AT45DB161E Ver la hoja de datos (PDF) - Atmel Corporation

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AT45DB161E

16-Mbits DataFlash (with Extra 512-Kbits), 2.3V or 2.5V Minimum SPI Serial Flash Memory

Atmel Corporation 

4. Device Operation

The device operation is controlled by instructions from the host processor. The list of instructions and their associated

opcodes are contained in Table 15-1 on page 40 through Table 15-4 on page 41. A valid instruction starts with the falling

edge of CS followed by the appropriate 8-bit opcode and the desired buffer or main memory address location. While the

CS pin is low, toggling the SCK pin controls the loading of the opcode and the desired buffer or main memory address

location through the SI (Serial Input) pin. All instructions, addresses, and data are transferred with the Most Significant Bit

(MSB) first.

Buffer addressing for the standard DataFlash page size (528 bytes) is referenced in the datasheet using the terminology

BFA9 - BFA0 to denote the 10 address bits required to designate a byte address within a buffer. The main memory

addressing is referenced using the terminology PA11 - PA0 and BA9 - BA0, where PA11 - PA0 denotes the 12 address

bits required to designate a page address, and BA9 - BA0 denotes the 10 address bits required to designate a byte

address within the page.

For the "Power of 2" binary page size (512 bytes), the buffer addressing is referenced in the datasheet using the

conventional terminology BFA8 - BFA0 to denote the nine address bits required to designate a byte address within a

buffer. Main memory addressing is referenced using the terminology A20 - A0, where A20 - A9 denotes the 12 address

bits required to designate a page address, and A8 - A0 denotes the nine address bits required to designate a byte

address within a page.

Atmel AT45DB161E [PRELIMINARY DATASHEET]

6

8782A–DFLASH–3/12

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