LTC1289CC(RevB) Ver la hoja de datos (PDF) - Linear Technology

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LTC1289CC
(Rev.:RevB)

3 Volt Single Chip 12-Bit Data Acquisition System

Linear Technology 

LTC1289

APPLICATI S I FOR ATIO

The LTC1289 is a data acquisition component which

contains the following functional blocks:

1. 12-bit successive approximation capacitive A/D

converter

2. Analog multiplexer (MUX)

3. Sample-and-hold (S/H)

4. Synchronous, full duplex serial interface

5. Control and timing logic

DIGITAL CONSIDERATIONS

Serial Interface

The LTC1289 communicates with microprocessors and

other external circuitry via a synchronous, full duplex, four

wire serial interface (see Operating Sequence). The shift

clock (SCLK) synchronizes the data transfer with each bit

being transmitted on the falling SCLK edge and captured

on the rising SCLK edge in both transmitting and receiving

systems. The data is transmitted and received simulta-

neously (full duplex).

Data transfer is initiated by a falling chip select (CS) signal.

After the falling CS is recognized, an 8-bit input word is

shifted into the DIN input which configures the LTC1289

for the next conversion. Simultaneously, the result of the

previous conversion is output on the DOUT line. At the end

of the data exchange the requested conversion begins and

CS should be brought high. After tCONV, the conversion is

complete and the results will be available on the next data

transfer cycle. As shown below, the result of a conversion

is delayed by one CS cycle from the input word requesting

it.

DIN DIN WORD 1

DIN WORD 2

DIN WORD 3

DOUT

DOUT WORD 0

DATA

TRANSFER

tCONV

A/D

CONVERSION

DOUT WORD 1

DATA

TRANSFER

tCONV

A/D

CONVERSION

DOUT WORD 2

LTC1289 AI01

Input Data Word

The LTC1289 8-bit data word is clocked into the DIN input

on the first eight rising SCLK edges after chip select is

recognized. Further inputs on the DIN pin are then ignored

until the next CS cycle. The eight bits of the input word are

defined as follows:

SGL/

DIFF

UNIPOLAR/

BIPOLAR

WORD

LENGTH

ODD/ SELECT SELECT

SIGN

1

0

UNI

MSBF WL1

WL0

MUX ADDRESS

MSB-FIRST/

LSB-FIRST

LTC1289 AI02

SCLK

CS

DIN

DOUT

Operating Sequence

(Example: Differential Inputs (CH3-CH2), Bipolar, MSB-First and 12-Bit Word Length)

tCYC

1 2 3 4 5 6 7 8 9 10 11 12

tSMPL

DON'T CARE

tCONV

SHIFT CONFIGURATION

WORD IN

DON'T CARE

B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

(SB)

SHIFT A/D RESULT OUT AND

NEW CONFIGURATION WORD IN

LTC1289 AI03

1289fb

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