datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

ADV7310 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
fabricante
ADV7310 Datasheet PDF : 84 Pages
First Prev 71 72 73 74 75 76 77 78 79 80 Next Last
Mode 2—Master Option
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode, the ADV7310/ADV7311 can generate horizontal
and vertical sync signals. A coincident low transition of both
HSYNC and VSYNC inputs indicates the start of an odd field.
A VSYNC low transition when HSYNC is high indicates the
start of an even field. The BLANK signal is optional. When the
BLANK input is disabled, the ADV7310/ADV7311 automati-
cally blank all normally blank lines as per CCIR-624. HSYNC
is output on S_HSYNC , BLANK on S_BLANK, and VSYNC
on S_VSYNC.
ADV7310/ADV7311
HSYNC
VSYNC
BLANK
PAL = 12 ؋ CLOCK/2
NTSC = 16 ؋ CLOCK/2
PIXEL
DATA
PAL = 132 ؋ CLOCK/2
NTSC = 122 ؋ CLOCK/2
Cb Y Cr Y
Figure 87. SD Timing Mode 2 Even to Odd Field Transition Master/Slave
HSYNC
VSYNC
BLANK
PAL = 12 ؋ CLOCK/2
NTSC = 16 ؋ CLOCK/2
PAL = 864 ؋ CLOCK/2
NTSC = 858 ؋ CLOCK/2
PIXEL
DATA
Cb
Y
Cr
Y
Cb
PAL = 132 ؋ CLOCK/2
NTSC = 122 ؋ CLOCK/2
Figure 88. SD Timing Mode 2 Odd to Even Field Transition Master/Slave
REV. A
–71–

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]