ADT7490 Ver la hoja de datos (PDF) - Analog Devices
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ADT7490 Datasheet PDF : 76 Pages
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ADT7490
SMBus TIMEOUT
The ADT7490 includes an SMBus timeout feature. If there is no
SMBus activity for 35 ms, the ADT7490 assumes the bus is
locked and releases the bus. This prevents the device from
locking or holding the SMBus expecting data. Some SMBus
controllers cannot work with the SMBus timeout feature, so it
can be disabled.
Configuration Register 7 (Register 0x11)
Bit 4 (TODIS) = 0, SMBus timeout enabled (default).
Bit 4 (TODIS) = 1, SMBus timeout disabled.
VOLTAGE MEASUREMENT INPUT
The ADT7490 has six external voltage measurement channels.
It can also measure its own supply voltage, VCC.
Pin 20 to Pin 23 can measure 5 V, 12 V, and 2.5 V supplies, and
the processor core voltage VCCP (0 V to 3 V input). The 2.5 V
input can be used to monitor a chipset supply voltage in
computer systems. The VCC supply voltage measurement is
carried out through the VCC pin (Pin 4). Pin 8 measures the
processor’s VTT voltage and is the dedicated reference voltage for
the PECI circuitry. The IMON input on Pin 19 can be used to
monitor the IMON output of the Analog Devices ADP319x family
of VR10/VR11 controllers. IMON is a voltage representation of
the CPU current.
Analog-to-Digital Converter
All analog inputs are multiplexed into the on-chip, successive-
approximation, analog-to-digital converter. This ADC has a
resolution of 10 bits. The basic input range is 0 V to 2.25 V,
but the inputs have built-in attenuators to allow measurement
of 2.5 V, 3.3 V, 5 V, 12 V, and the processor core voltage VCCP
without any external components. To allow the tolerance of
these supply voltages, the ADC produces an output of ¾ full
scale (768 dec or 0x300 hex) for the nominal input voltage, and
therefore, has adequate headroom to cope with overvoltages.
Input Circuitry
The internal structure for the analog inputs is shown in Figure 25.
The input circuit consists of an input protection diode, an
attenuator, plus a capacitor to form a first-order low-pass filter
that gives input immunity to high frequency noise.
Voltage Measurement Registers
Register 0x1D, IMON Reading = 0x00 default
Register 0x1E, VTT Reading = 0x00 default
Register 0x20, +2.5VIN Reading = 0x00 default
Register 0x21, VCCP Reading = 0x00 default
Register 0x22, VCC Reading = 0x00 default
Register 0x23, +5VIN Reading = 0x00 default
Register 0x24, +12VIN Reading = 0x00 default
12VIN
120kΩ
20kΩ
5VIN
93kΩ
47kΩ
3.3VIN
2.5VIN
VCCP
IMON
VTT
68kΩ
71kΩ
45kΩ
94kΩ
17.5kΩ
52.5kΩ
45kΩ
94kΩ
45kΩ
45kΩ
30pF
30pF
30pF
30pF
MUX
35pF
30pF
30pF
Figure 25. Analog Inputs structure
Voltage Limit Registers
Associated with each voltage measurement channel is a high
and low limit register. Exceeding the programmed high or low
limit causes the appropriate status bit to be set. Exceeding either
limit can also generate SMBALERT interrupts.
Register 0x85, IMON Low Limit = 0x00 default
Register 0x87, IMON High Limit = 0xFF default
Register 0x84, VTT Low Limit = 0x00 default
Register 0x86, VTT High Limit = 0xFF default
Register 0x44, +2.5VIN Low Limit = 0x00 default
Register 0x45, +2.5VIN High Limit = 0xFF default
Register 0x46, VCCP Low Limit = 0x00 default
Register 0x47, VCCP High Limit = 0xFF default
Register 0x48, VCC Low Limit = 0x00 default
Register 0x49, VCC High Limit = 0xFF default
Register 0x4A, +5VIN Low Limit = 0x00 default
Register 0x4B, +5VIN High Limit = 0xFF default
Register 0x4C, +12VIN Low Limit = 0x00 default
Register 0x4D, +12VIN High Limit = 0xFF default
When the ADC is running, it samples and converts a voltage
input in 0.7 ms and averages 16 conversions to reduce noise;
a measurement takes nominally 11 ms.
Rev. 0 | Page 16 of 76
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