7411(2017) Ver la hoja de datos (PDF) - Analog Devices

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7411
(Rev.:2017)

SPI-/I2C-Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC

Analog Devices 

Data Sheet

SPI Lock Status Register (Read-Only) [Address = 7Fh]

Bit D0 (LSB) of this read-only register indicates whether the SPI

interface is locked or not. Writing to this register causes the

device to malfunction.

Default value is 00h.

0 = I2C interface.

1 = SPI interface selected and locked.

SERIAL INTERFACE

There are two serial interfaces that can be used on this part: I2C

and SPI. The device powers up with the serial interface in I2C

mode, but it is not locked into this mode. To stay in I2C mode, it

is recommended that the user tie the CS line to either VCC or

GND. It is not possible to lock the I2C mode, but it is possible to

select and lock the SPI mode.

To select and lock the interface into the SPI mode, a number of

pulses must be sent down the CS (Pin 4) line. The following

section describes how this is done.

Once the SPI communication protocol is locked in, it cannot be

unlocked while the device is still powered up. Bit D0 of the SPI

Lock Status register (Address 7Fh) is set to 1 when a successful

SPI interface lock is accomplished. To reset the serial interface,

the user must power down the part and power up again. A

software reset does not reset the serial interface.

Serial Interface Selection

The CS line controls the selection between I2C and SPI.

Figure 33 shows the selection process necessary to lock the SPI

interface mode.

To communicate to the ADT7411 using the SPI protocol, send

three pulses down the CS line, as shown in Figure 33. On the

third rising edge (marked as C in Figure 33), the part selects

and locks the SPI interface. Communication to the device is

now limited to the SPI protocol.

As per most SPI standards, the CS line must be low during

every SPI communication to the ADT7411, and high at all other

times. Typical examples of how to connect the dual interface as

I2C or SPI are shown in Figure 31 and Figure 32.

ADT7411

VDD

VDD

10kΩ

10kΩ

CS

SDA

SCL

I2C ADDRESS = 1001 000

ADD

Figure 31. Typical I2C Interface Connection

ADT7411

ADT7411

LOCK AND

SELECT SPI

CS

DIN

SCLK

DOUT

VDD

820Ω 820Ω 820Ω

SPI FRAMING

EDGE

Figure 32. Typical SPI Interface Connection

The following sections describe in detail how to use the I2C and

SPI protocols associated with the ADT7411.

I2C Serial Interface

Like all I2C compatible devices, the ADT7411 has a 7-bit serial

address. The four MSBs of this address for the ADT7411 are set

to 1001. The three LSBs are set by Pin 11, ADD. The ADD pin

can be configured three ways to give three different address

options: low, floating, and high. Setting the ADD pin low gives a

serial bus address of 1001 000, leaving it floating gives the

Address 1001 010, and setting it high gives the Address 1001

011. The recommended pull-up resistor value is 10 kΩ.

There is an enable/disable bit for the SMBus timeout. When this

is enabled, the SMBus times out after 25 ms of no activity. To

enable it, set Bit 6 of the Control Configuration 2 register. The

power-up default is with the SMBus timeout disabled.

The ADT7411 supports SMBus packet error checking (PEC)

and its use is optional. It is triggered by supplying the extra

clocks for the PEC byte. The PEC is calculated using CRC-8.

The frame clock sequence (FCS) conforms to CRC-8 by the

polynomial

C (x) = x8 + x2 + x1 +1

Consult the SMBus specification for more information.

The serial bus protocol operates as follows:

1. The master initiates a data transfer by establishing a start

condition, defined as a high-to-low transition on the serial

data line SDA while the serial clock line SCL remains high.

This indicates that an address/data stream follows. All slave

peripherals connected to the serial bus respond to the start

condition and shift in the next eight bits, consisting of a

7-bit address (MSB first) plus an R/W bit, which

determines the direction of the data transfer, that is,

whether data is written to or read from the slave device.

Rev. C | Page 29 of 36

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