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ADP3808

High Efficiency Switch Mode Li-Ion Battery Charger

Analog Devices 

ADP3808

VIN

C14

2.2µF

1/2 Q1

FD56990A

R13 C15 +

10Ω 22µF –

C9

L1

22µH

1/2 Q1

FD56990A

C16

22µF

–

+

RCS

20mΩ

C13

22µF

R4

510Ω

RSS

10mΩ

SYSTEM

DC/DC

C1

2.2µF

R2

510Ω

3.3V

100nF

VCC BST DRV SW DRVL PGND

CSP CSM

SYSP SYSM

ISYS

LIMIT

BATTERY

12.6V/16.8V

DRVREG

7.0V

C10

0.1µF

EN

VREF + VREG

UVLO

BIAS

LOGIC

CONTROL

ADP3808

AGND

BOOTSTRAPPED

SYNCHRONOUS

DRIVER

EN IN DRVLSD DRVLSD

–

+

+

–

+–

AMP1

VTH

–

gm1

+

AMP2

1V

SYSP

BAT

OSCILLATOR

–

gm2

+

CHARGE

CURRENT

SETPOINT

BATTERY

VOLTAGE

ADJUST

3-/4-CELL

SELECTION

RT

COMP

150kΩ

C8

0.22µF

R8

56Ω

C11

CELLSEL

LIMSET

EXTPWR

CSADJ

BAT

REFIN

BATADJ

3.3V

R9

R10

3.3V

R11

R12

Figure 16. Typical Application Circuit

FINAL BATTERY VOLTAGE CONTROL

As the battery approaches its final voltage, the ADP3808

switches from CC mode to CV mode. The change is achieved

by the common output node of gm1 and gm2. Only one of the

two outputs controls the voltage at the COMP pin. Both

amplifiers can only pull down on COMP, such that when either

amplifier has a positive differential input voltage, its output is

not active. For example, when the battery voltage, VBAT, is low,

gm2 does not control VCOMP. When the battery voltage reaches

the desired final voltage, gm2 takes control of the loop, and the

charge current is reduced.

Amplifier gm2 compares the battery voltage to a programmable

level set by pins BATADJ and REFIN. The target battery voltage

is dependent on the state of the CELLSEL pin as CELLSEL sets

the number of cells to be charged. Pulling CELLSEL high sets

the ADP3808 to charge three cells. When CELLSEL is tied to

ground, four cells are selected. CELLSEL has a 2 μA pull-up

current as a fail-safe to select three cells when it is left open.

The final battery voltage is programmable from 4.0 V to 4.5 V

per cell. The programming voltage is applied to the BATADJ pin

and is ratioed to the REFIN pin. The battery voltage VBAT is set

according to Equation 2 and Equation 3.

For CELLSEL > 2 V:

VBAT

=

12

V+

1.5

V

BATADJ

REFIN

(2)

For CELLSEL < 0.8 V:

VBAT

=

16

V+

2

V

BATADJ

REFIN

(3)

OSCILLATOR AND PWM

The oscillator generates a triangle waveform between 1 V and

2 V, which is compared to the voltage at the COMP pin, setting

the duty cycle of the driver stage. When VCOMP is below 1.0 V,

the duty cycle is zero. Above 2.0 V, the duty cycle reaches its

maximum. The oscillator frequency is set by the external

resistor at the RT pin, ROSC, and is given by Equation 4.

f OSC

=

41 × 109

ROSC

(4)

Rev. 0 | Page 11 of 16

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