ADG1236(Rev0) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

fabricante

ADG1236
(Rev.:Rev0)

Low Capacitance, Low Charge Injection, ±15 V/12 V iCMOS™, Dual SPDT Switch

Analog Devices 

ADG1236

OUTLINE DIMENSIONS

5.10

5.00

4.90

16

9

4.50

4.40

4.30

1

6.40

BSC

8

PIN 1

1.20

0.15

MAX

0.20

0.05

0.09

0.75

0.30

8°

0.60

0.65

BSC

0.19 SEATING

PLANE

0°

0.45

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-153AB

Figure 30. 16-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-16)

Dimensions shown in millimeters

3.00

BSC SQ

0.75

0.55

0.60 MAX

0.35

PIN 1

INDICATOR

12 MAX

1.00

0.85

0.80

SEATING

PLANE

TOP

VIEW

0.45

2.75

BSC SQ

10

9

11

12 1

8

2

0.80 MAX

0.65 TYP

EXPOSED PAD

7

3

654

(BOTTOM VIEW)

0.50

BSC

0.05 MAX

0.02 NOM

COPLANARITY

0.30

0.20 REF

0.08

0.23

0.18

PIN 1

INDICATOR

*1.45

1.30 SQ

1.15

0.25 MIN

*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1

EXCEPT FOR EXPOSED PAD DIMENSION.

Figure 31. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

3 mm × 3 mm Body, Very Thin Quad

(CP-12-1)

Dimensions shown in millimeters

ORDERING GUIDE

Model

ADG1236YRUZ1

ADG1236YRUZ-REEL1

ADG1236YRUZ-REEL71

ADG1236YCPZ-500RL71

ADG1236YCPZ-REEL71

Temperature Range

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

−40°C to +125°C

1 Z = Pb-free part.

Package Description

16-Lead Thin Shrink Small Outline Package [TSSOP]

16-Lead Thin Shrink Small Outline Package [TSSOP]

16-Lead Thin Shrink Small Outline Package [TSSOP]

12-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

12-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

Package Option

RU-16

RU-16

RU-16

CP-12-1

CP-12-1

Rev. 0 | Page 14 of 16

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