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ADAU1761BCPZ-RL

SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL

Analog Devices 

ADAU1761

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Specifications..................................................................................... 4

Analog Performance Specifications ........................................... 4

Power Supply Specifications........................................................ 7

Typical Current Consumption.................................................... 8

Typical Power Management Measurements ............................. 9

Digital Filters............................................................................... 10

Digital Input/Output Specifications......................................... 10

Digital Timing Specifications ................................................... 11

Digital Timing Diagrams........................................................... 12

Absolute Maximum Ratings.......................................................... 14

Thermal Resistance .................................................................... 14

ESD Caution................................................................................ 14

Pin Configuration and Function Descriptions........................... 15

Typical Performance Characteristics ........................................... 17

System Block Diagrams ................................................................. 20

Theory of Operation ...................................................................... 23

Startup, Initialization, and Power ................................................. 24

Power-Up Sequence ................................................................... 24

Power Reduction Modes............................................................ 24

Digital Power Supply.................................................................. 24

Input/Output Power Supply...................................................... 24

Clock Generation and Management........................................ 24

Clocking and Sampling Rates ....................................................... 26

Core Clock................................................................................... 26

Sampling Rates............................................................................ 27

PLL ............................................................................................... 27

Record Signal Path.......................................................................... 29

Input Signal Paths....................................................................... 29

Analog-to-Digital Converters................................................... 31

Automatic Level Control (ALC) ................................................... 32

ALC Parameters.......................................................................... 32

Noise Gate Function .................................................................. 33

Playback Signal Path ...................................................................... 35

Output Signal Paths ................................................................... 35

Headphone Output .................................................................... 36

Pop-and-Click Suppression ...................................................... 37

Line Outputs ............................................................................... 37

Control Ports................................................................................... 38

Burst Mode Writing and Reading ............................................ 38

I2C Port ........................................................................................ 38

SPI Port ........................................................................................ 41

Serial Data Input/Output Ports .................................................... 42

Applications Information .............................................................. 44

Power Supply Bypass Capacitors.............................................. 44

GSM Noise Filter ........................................................................ 44

Grounding ................................................................................... 44

Exposed Pad PCB Design ......................................................... 44

DSP Core ......................................................................................... 45

Signal Processing........................................................................ 45

Architecture ................................................................................ 45

Program Counter ....................................................................... 45

Features........................................................................................ 45

Startup.......................................................................................... 45

Numeric Formats ....................................................................... 46

Programming.............................................................................. 46

Program RAM, Parameter RAM, and Data RAM ..................... 47

Program RAM ............................................................................ 47

Parameter RAM.......................................................................... 47

Data RAM ................................................................................... 47

Read/Write Data Formats ......................................................... 47

Software Safeload ....................................................................... 48

Software Slew .............................................................................. 49

General-Purpose Input/Output.................................................... 50

GPIO Pins Set from the Control Port...................................... 50

Control Registers ............................................................................ 51

Control Register Details ............................................................ 52

Outline Dimensions ....................................................................... 92

Ordering Guide .......................................................................... 92

Rev. C | Page 2 of 92

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