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AD9889BBSTZ-165

High Performance HDMI/DVI Transmitter

Analog Devices 

AD9889B

BGA

D5, D6, D7, E7

G4, G5, J1

D4, E4, F4, J4,

G6, J6, K6, F7,

G7, H9, J9

N/A

F9

F10

E10

E9

G9

G10

Pin No.

LFCSP

1, 48, 49

15, 16, 17,

N/A

64, paddle

on bottom

side

36

35

37

38

34

33

LQFP

1, 61, 62, 63, 64

16, 19, 20, 21

15, 17, 18, 22, 26,

32, 39, 42, 43, 59,

60, 79, 80

N/A

47

46

48

49

45

44

Mnemonic

DVDD

PVDD

GND

DGND

SDA

SCL

MDA

MCL

DDCSDA

DDCSCL

Type 1

P

P

P

P

C3

C3

C3

C3

C3

C3

Description

1.8 V Power Supply for Digital and I/O Power Supply. These

pins supply power to the digital logic and I/Os. They should

be filtered and as quiet as possible.

1.8 V PLL Power Supply. The most sensitive portion of the

AD9889B is the clock generation circuitry. These pins provide

power to the clock PLL. The designer should provide quiet,

noise-free power to these pins.

Ground. The ground return for all circuitry on-chip. For best

practice, assemble the AD9889B on a single, solid ground

plane with careful attention given to ground current paths.

Digital Ground. The ground return for all circuitry on-chip. For

best practice, assemble the AD9889B on a single, solid

ground plane with careful attention given to ground current

paths.

Serial Port Data I/O. This pin serves as the serial port data I/O

slave for register access. Supports CMOS logic levels from

1.8 V to 3.3 V.

Serial Port Data Clock. This pin serves as the serial port data

clock slave for register access. Supports CMOS logic levels

from 1.8 V to 3.3 V.

Serial Port Data I/O Master to HDCP Key EEPROM. Supports

CMOS logic levels from 1.8 V to 3.3 V.

Serial Port Data Clock Master to HDCP Key EEPROM. Supports

CMOS logic levels from 1.8 V to 3.3 V.

Serial Port Data I/O to Receiver. This pin serves as the master

to the DDC bus. Supports a 5 V CMOS logic level.

Serial Port Data Clock to Receiver. This pin serves as the

master clock for the DDC bus. Supports a 5 V CMOS logic level.

1 I = input, O = output, P = power supply, C = control.

2 Pin J7 (BGA), Pin 26 (LFCSP), and Pin 33 (LQFP) are dual function pins: I2C selection and power-down control. The I2C selection function occurs at power-up; the power-

down control function occurs whenever the state of the pin is changed from its original state at power-up.

3 For a full description of the 2-wire serial interface and its functionality, obtain documentation by contacting NDA from flatpanel_apps@analog.com.

Rev. 0 | Page 8 of 12

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