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fabricante

AD9882

Dual Interface for Flat Panel Displays

Analog Devices 

AD9882

Table I. Complete Pinout List

Pin

Type

Mnemonic Function

Value

Analog

RAIN

Video Inputs GAIN

BAIN

External HSYNC

Sync/Clock VSYNC

SOGIN

Analog Input for Converter R

Analog Input for Converter G

Analog Input for Converter B

Horizontal Sync Input

Vertical Sync Input

Input for Sync-on-Green

0.0 V to 1.0 V

0.0 V to 1.0 V

0.0 V to 1.0 V

3.3 V CMOS

3.3 V CMOS

0.0 V to 1.0 V

Sync

Outputs

HSOUT

VSOUT

SOGOUT

HSYNC Output Clock (Phase-Aligned with DATACK) 3.3 V CMOS

VSYNC Output Clock

3.3 V CMOS

Sync-on-Green Slicer Output

3.3 V CMOS

References REFBYPASS Internal Reference Bypass

MIDBYPASS Internal Midscale Voltage Bypass

1.25 V

PLL Filter FILT

Connection for External Filter Components for

Internal PLL

Power

Supply

VD

VDD

PVD

GND

Analog Power Supply

Output Power Supply

PLL Power Supply

Ground

3.15 V to 3.45 V

2.2 V to 3.6 V

3.15 V to 3.45 V

0V

Serial Port

Control

SDA

SCL

A0

Serial Port Data I/O

Serial Port Data Clock (100 kHz Max)

Serial Port Address Input

3.3 V CMOS

3.3 V CMOS

3.3 V CMOS

Data

Outputs

Red [7:0]

Green [7:0]

Blue [7:0]

Outputs of Converter “Red”, Bit 7 is the MSB

Outputs of Converter “Green”, Bit 7 is the MSB

Outputs of Converter “Blue”, Bit 7 is the MSB

3.3 V CMOS

3.3 V CMOS

3.3 V CMOS

Data Clock

Output

DATACK

Data Output Clock for the Analog and Digital Interface 3.3 V CMOS

Digital Video RX0+

Data Inputs RX0–

RX1+

RX1–

RX2+

RX2–

Digital Video RXC+

Clock Inputs RXC–

Data Enable DE

Digital Input Channel 0 True

Digital Input Channel 0 Complement

Digital Input Channel 1 True

Digital Input Channel 1 Complement

Digital Input Channel 2 True

Digital Input Channel 2 Complement

Digital Data Clock True

Digital Data Clock Complement

Data Enable

3.3 V CMOS

Control Bits CTL [0:3] Decoded Control Bits

3.3 V CMOS

RTERM

HDCP

RTERM

DDCSCL

DDCSDA

MCL

MDA

Sets Internal Termination Resistance

HDCP Slave Serial Port Data Clock

HDCP Slave Serial Port Data I/O

HDCP Master Serial Port Data Clock

HDCP Master Serial Port Data I/O

3.3 V CMOS

3.3 V CMOS

3.3 V CMOS

3.3 V CMOS

Pin

Number Interface

70

Analog

65

Analog

59

Analog

79

Analog

80

Analog

64

Analog

88

Both

87

Both

89

Analog

73

Analog

74

Analog

48

Analog

78

77

76

92–99

2–9

12–19

Both

Both

Both

Both

Both

Both

Both

Both

Both

Both

85

33

32

36

35

39

38

41

42

86

22–25

28

53

54

81

82

Both

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

Digital

–8–

REV. A

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