AD9852ASVZ(RevF) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

fabricante

AD9852ASVZ
(Rev.:RevF)

CMOS 300 MSPS Complete DDS

Analog Devices 

Data Sheet

REFERENCE

CLOCK

AD9852

DDS

FILTER

PHASE

LOOP

COMPARATOR FILTER

RF FREQUENCY

OUT

VCO

TUNING

WORD

DIVIDE-BY-N

Figure 29. Agile High Frequency Synthesizer

AD9852

REFERENCE

CLOCK

DIFFERENTIAL

TRANSFORMER-COUPLED

IOUT

OUTPUT

FILTER

AD9852

50

DDS

IOUT

50

1:1 TRANSFORMER

THAT IS, Mini-Circuits® T1-1T

Figure 30. Differential Output Connection for Reduction of Common-Mode Signals

AD9852

PROCESSOR/

8-BIT PARALLEL OR

SERIAL PROGRAMMING

COSINE

DAC

1

CONTROLLER

DATA AND CONTROL

FPGA, ETC.

SIGNALS

CONTROL

2

REFERENCE

CLOCK

300MHz MAX DIRECT

DAC

MODE OR 15MHz TO 75MHz

MAX IN THE 4 TO 20 CLOCK

MULTIPLIER MODE

2k RSET

LOW-PASS

FILTER

LOW-PASS

FILTER

NOTES

1. IOUT = APPROXIMATELY 20mA MAX WHEN RSET = 2k.

2. SWITCH POSITION 1 PROVIDES COMPLEMENTARY

SINUSOIDAL SIGNALS TO THE COMPARATOR TO

PRODUCE A FIXED 50% DUTY CYCLE FROM THE

COMPARATOR.

3. SWITCH POSITION 2 PROVIDES A USER-PROGRAMMABLE

DC THRESHOLD VOLTAGE TO ALLOW SETTING OF THE

COMPARATOR DUTY CYCLE.

CMOS LOGIC CLOCK OUT

Figure 31. Frequency Agile Clock Generator Applications for the AD9852

Rev. F | Page 17 of 41

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