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AD9228-65EB

Quad, 12-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter

Analog Devices 

AD9228

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

AC Specifications.......................................................................... 4

Digital Specifications ................................................................... 5

Switching Specifications .............................................................. 6

Timing Diagrams.............................................................................. 7

Absolute Maximum Ratings............................................................ 9

Thermal Impedance ..................................................................... 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Equivalent Circuits ......................................................................... 12

Typical Performance Characteristics ........................................... 14

Theory of Operation ...................................................................... 19

Analog Input Considerations ................................................... 19

Clock Input Considerations...................................................... 22

Serial Port Interface (SPI).............................................................. 30

Hardware Interface..................................................................... 30

Memory Map .................................................................................. 32

Reading the Memory Map Table.............................................. 32

Reserved Locations .................................................................... 32

Default Values ............................................................................. 32

Logic Levels................................................................................. 32

Evaluation Board ............................................................................ 36

Power Supplies............................................................................ 36

Input Signals................................................................................ 36

Output Signals ............................................................................ 36

Default Operation and Jumper Selection Settings................. 37

Alternative Analog Input Drive Configuration...................... 38

Outline Dimensions ....................................................................... 52

Ordering Guide .......................................................................... 52

REVISION HISTORY

7/07—Rev. A to Rev. B

Changes to Figure 3.......................................................................... 7

Change to Table 7 ........................................................................... 10

5/07—Rev. 0 to Rev. A

Changes to Features.......................................................................... 1

Change to Effective Number of Bits (ENOB) ............................... 4

Changes to Logic Output (SDIO/ODM) Section......................... 5

Added Endnote 3 to Table 3 ............................................................ 5

Changes to Pipeline Latency ........................................................... 6

Added Endnote 2 to Table 4 ............................................................ 6

Changes to Figure 2 to Figure 4 ...................................................... 7

Changes to Figure 10...................................................................... 12

Changes to Figure 15, Figure 17 to Figure 19, Figure 37, and

Figure 39 ..................................................................................... 14

Changes to Figure 23 to Figure 26 Captions ............................... 15

Change to Figure 35 Caption ........................................................ 17

Added Figure 46 and Figure 47..................................................... 20

Changes to Figure 51...................................................................... 21

Changes to Clock Duty Cycle Considerations Section.............. 22

Changes to Power Dissipation and Power-Down Mode Section ...23

Changes to Figure 61 to Figure 63 Captions ............................... 25

Changes to Table 9 Endnote.......................................................... 26

Changes to Digital Outputs and Timing Section ....................... 27

Added Table 10 ............................................................................... 27

Changes to RBIAS Pin Section ..................................................... 28

Deleted Figure 62 and Figure 63 .................................................. 27

Changes to Figure 67...................................................................... 29

Changes to Hardware Interface Section ...................................... 30

Added Figure 68 ............................................................................. 31

Changes to Table 15 ....................................................................... 31

Changes to Reading the Memory Map Table Section ............... 32

Change to Input Signals Section................................................... 36

Changes to Output Signals Section.............................................. 36

Changes to Figure 71...................................................................... 36

Changes to Default Operation and

Jumper Selection Settings Section........................................... 37

Changes to Alternative Analog Input

Drive Configuration Section.................................................... 38

Changes to Figure 74...................................................................... 40

Changes to Table 17 ....................................................................... 48

Changes to Ordering Guide .......................................................... 52

4/06—Revision 0: Initial Version

Rev. B | Page 2 of 52

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