AD8802/AD8804
+10V
10µF
+10V
0.1µF
0.1µF
100Ω
REF195
IN OUT
GND
8
3
6
5
AD603 7
4
2
1
+5.0V
1µF
+10V
0.1µF
0.1µF
8
3
6
5
AD603 7
4
2
1
10µF
0.1µF
30kΩ
2.0V
20kΩ
1/2 OP279
A
O1 O2 O3 O4
VDD
VREFH
AD8804
VREFL
GND SHDN SDI CLK CS
1/2 OP279
B
40kΩ
1.0V
10kΩ
TO µC
Figure 30. A Low Noise 90 MHz PGA
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm)
20-Pin Plastic DIP Package
(N-20)
20-Lead SOIC Package
(R-20)
1.07 (27.18) MAX
20
1
PIN 1
11 0.255 (6.477)
10 0.245 (6.223)
0.060 (1.52)
0.015 (0.38)
0.32 (8.128)
0.30 (7.62) 0.135 (3.429)
0.125 (3.17)
0.145 (3.683)
MAX
0.125 (3.175)
MIN
0.021 (0.533) 0.11 (2.79) 0.065 (1.66) SEATING 15°
0.015 (0.381) 0.09 (2.28) 0.045 (1.15) PLANE
0
0.011 (0.28)
0.009 (0.23)
0.512 (13.00)
0.496 (12.60)
20
11
1
PIN 1
10
0.107 (2.72)
0.089 (2.26)
0.011 (0.275) 0.050
0.005 (0.125)
(1.27)
BSC
8°
0.022 (0.56) SEATING 0.015 (0.38) 0°
0.014 (0.36) PLANE 0.007 (0.18)
20-Lead Thin Surface Mount TSSOP Package
(RU-20)
0.260 (6.60)
0.252 (6.40)
20
11
0.034 (0.86)
0.018 (0.46)
1
10
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
PIN 1
0.0256 (0.65)
BSC
0.0433
(1.10)
MAX
8°
0.0118 (0.30)
0°
0.0075 (0.19) 0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
–16–
REV. 0