AD8324ACPZ(RevC) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

fabricante

AD8324ACPZ
(Rev.:RevC)

3.3 V, Upstream, Cable Line Driver

Analog Devices 

AD8324

Parameter

POWER SUPPLY

Operating Range

Quiescent Current

OPERATING TEMPERATURE RANGE

Test Conditions/Comments

Maximum gain

Minimum gain

Transmit disable (TXEN = 0)

SLEEP mode (power down)

20-lead LFCSP

20-lead QSOP

1 TOKO 458PT-1556 used for above specifications. Typical insertion loss of 0.5 dB at 10 MHz.

2 Guaranteed by design and characterization to ±6 sigma for TA = 25°C.

3 Guaranteed by design and characterization to ±3 sigma for TA = 25°C.

4 Measured through a 1:1 transformer.

5 Specification is worst case over all gain codes.

6 VIN = 27.5 dBmV, QPSK modulation, 160 kSPS symbol rate.

LOGIC INPUTS (TTL-/CMOS-COMPATIBLE LOGIC)

DATEN, CLK, SDATA, TXEN, SLEEP, VCC = 3.3 V, unless otherwise noted.

Table 2.

Parameter

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Current (VINH = 3.3 V), CLK, SDATA, DATEN

Logic 0 Current (VINL = 0 V), CLK, SDATA, DATEN

Logic 1 Current (VINH = 3.3 V), TXEN

Logic 0 Current (VINL = 0 V), TXEN

Logic 1 Current (VINH = 3.3 V), SLEEP

Logic 0 Current (VINL = 0 V), SLEEP

Min Typ

3.13 3.3

195 207

25

39

1

2.5

30

−40

−25

Data Sheet

Max Unit

3.47 V

235 mA

50

mA

4

mA

500 µA

+85 °C

+70 °C

Min

Typ

Max

Unit

2.1

3.3

V

0

0.8

V

0

20

nA

−600

−100

nA

50

190

µA

−250

−30

µA

50

190

µA

−250

−30

µA

Rev. C | Page 4 of 16

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