IN0A
IN0B
IN1A
IN1B
IN2A
IN2B
VREF
AD8188
MUX SYSTEM
“C_BYPASS”
INTERNAL CAP
BIAS REFERENCE
OUT0
OUT1
OUT2
DIRECT CONNECTION TO ANY “QUIET” AC GROUND
(FOR EXAMPLE, GND, VCC, AND VEE).
Figure 45. VREF Pin Connection for AD8188 (Differs from AD8189)
The AD8189
The AD8189 uses on-chip feedback resistors to realize the gain-
of-two function. To provide low crosstalk and a high output
impedance when disabled, each set of 500 Ω feedback resistors
is terminated by a dedicated reference buffer. A reference buffer
is a high speed op amp configured as a unity-gain follower. The
three reference buffers, one for each channel, share a single,
high impedance input, the VREF pin (see Figure 46). VREF input
bias current is typically less than 2 μA.
5V
A0
1×
OUT0
B0
VREF
5V
5V
GBUF 0
500Ω
500Ω
VFO
5V
VF-1
GBUF 1
500Ω 500Ω
5V
VF-2
GBUF 2
500Ω 500Ω
OUT1
OUT2
Figure 46. Conceptual Diagram of a Single Multiplexer Channel, G = 2
This configuration has a few implications for single-supply
operation:
• On the AD8189, VREF cannot be tied to the most negative
analog supply, VEE. The limits on reference voltage are (see
Figure 47):
VEE + 1.3 V < VREF × VCC − 1.6 V
1.3 V < VREF, 3.4 V on 0 V/5 V supplies
AD8188/AD8189
5V
A0
1.3V
OUT0
1.3V
5V
VO_MAX = 3.7V
VOUT
VO_MIN = 1.3V
GND
5V
VREF
1.6V
1.3V
5V
VO_MAX = 3.4V
VREF
VO_MIN = 1.3V
GND
Figure 47. Output Compliance of Main Amplifier Channel and Ground Buffer
• The signal at the VREF pin appears at each output.
Therefore, VREF should be tied to a well bypassed, low
impedance source. Using superposition, it is shown that
VOUT = 2 × VIN − VREF
• To maximize the output dynamic range, the reference
voltage should be chosen with care. For example, consider
amplifying a 700 mV video signal with a sync pulse
300 mV below black level. If the user decides to set VREF at
black level to preferentially run video signals on the faster
NPN transistor path, the AD8189 allows a reference
voltage as low as 1.3 V + 300 mV = 1.6 V. If the AD8189 is
used, the sync pulse is amplified to 600 mV. Therefore, the
lower limit on VREF becomes 1.3 V + 600 mV = 1.9 V. For
routing RGB video, an advantageous configuration is to
employ +3 V and −2 V supplies, in which case VREF can be
tied to ground.
If system considerations prevent running the multiplexer on
split supplies, a false ground reference should be employed. A
low impedance reference can be synthesized with a second
operational amplifier. Alternately, a well bypassed resistor
divider can be used. Refer to the Applications section for
further explanation and more examples.
5V
100kΩ
10kΩ
0.022µF
100Ω
OP21
1µF
FROM 1992 ADI AMPLIFIER
APPLICATIONS GUIDE
VREF
1µF
GND
Figure 48. Synthesis of a False Ground Reference
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