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AD7747

24-Bit Capacitance-to-Digital Converter with Temperature Sensor

Analog Devices 

the bus, allowing another master device to take control of the

bus. Therefore, a master wanting to retain control of the bus

issues successive start conditions known as repeated start

conditions.

AD7747 RESET

To reset the AD7747 without having to reset the entire I2C bus,

an explicit reset command is provided. This uses a particular

address pointer word as a command word to reset the part and

upload all default settings. The AD7747 does not respond to the

I2C bus commands (do not acknowledge) during the default

values upload for approximately 150 μs (max 200 μs).

The reset command address word is 0xBF.

AD7747

GENERAL CALL

When a master issues a slave address consisting of seven 0s with

the eighth bit (R/W bit) set to 0, this is known as the general call

address. The general call address is for addressing every device

connected to the I2C bus. The AD7747 acknowledges this

address and read in the following data byte.

If the second byte is 0x06, the AD7747 is reset, completely

uploading all default values. The AD7747 does not respond to

the I2C bus commands (do not acknowledge) during the default

values upload for approximately 150 μs (200 μs maximum).

The AD7747 does not acknowledge any other general call

commands.

SDATA

SCLOCK S 1–7 8 9

1–7 8 9

START ADDR R/W ACK SUBADDRESS ACK

1–7 8

DATA

Figure 22. Bus Data Transfer

9

ACK

P

STOP

WRITE S SLAVE ADDR A(S) SUB ADDR A(S)

SEQUENCE

LSB = 0

DATA

A(S)

LSB = 1

DATA

A(S) P

READ

SEQUENCE

S SLAVE ADDR A(S) SUB ADDR A(S) S SLAVE ADDR A(S)

DATA

A(M)

S = START BIT

P = STOP BIT

A(S) = ACKNOWLEDGE BY SLAVE

A(M) = ACKNOWLEDGE BY MASTER

A(S) = NO ACKNOWLEDGE BY SLAVE

A(M) = NO ACKNOWLEDGE BY MASTER

Figure 23. Write and Read Sequences

DATA

A(M) P

Rev. 0 | Page 13 of 28

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